Page 21 - Complete Wireless Design

Wireless Essentials

20 Chapter One

BV , the collector-to-base breakdown voltage, the amplitude of collector
CBO
voltage that will normally break down the collector junction
P , the maximum total power dissipation a transistor is capable of in an
D(MAX)
ambient air temperature of 25°C
T , the maximum internal junction temperature before the
J(MAX)
semiconductor material breaks down
I , the maximum collector current of the BJT
C(MAX)
f , the current gain–bandwidth product, the frequency that a common-
T
emitter transistor will be at a beta of unity
f , the beta cutoff frequency, the frequency that the BJT’s beta decreases to
ae
70.7 percent of its low frequency value
I , the temperature-dependent leakage current that occurs from the
CEO
emitter to the collector with the base open
Junction field-effect transistor (JFET). Since a JFET’s input gates are always
reversed biased, they will have a very high low-frequency input impedance,
and are thus voltage controlled. Junction field-effect transistors are also quite
capable of receiving an input of up to several volts (compared to the bipolar
transistor’s few tenths of a volt), and create less internal noise than a BJT, but
they display less voltage gain and more signal distortion.
As shown in Fig. 1.24, the structure of a JFET is composed of a gate, a
source, and a drain. The JFET’s terminals are voltage biased in such a way
that the drain-to-source voltage (V ) causes the source to be more negative
DS
than the drain. This lets the drain current (I ) flow from the source to the
D
drain through the N channel.
The JFET characteristic curves of Fig. 1.25 readily indicate that a JFET is
a normally on device when there is no bias voltage present at the gate. This
permits the maximum JFET current (I ) to flow from the source to the drain.
DSS
When the gate and source are presented with a negative voltage ( V ), an
GS
area lacking charge carriers (the depletion region) starts to form within the
JFET’s N channel. This N channel depletion region functions as an insulator;
therefore, as the JFET becomes increasingly reverse biased and increasingly
exhausted of any charge carriers, the N channel continues to be narrowed by
this developing depletion region. The channel’s resistance rises, decreasing the
JFET’s current output into its load resistor, which lowers the device’s output
voltage across this resistor. As the negative gate voltage of V is increased,
GS
the depletion region continues to widen, decreasing current flow even fur-
ther—but a point is ultimately reached where the channel is totally depleted
of all majority carriers, and no more current flow is possible. The voltage at
which the current flow stops is referred to as V . In short, the V suc-
GS(OFF) GS
cessfully controls the JFET’s channel resistance, and thus its drain current.
However, it is important that the drain-to-source voltage V should be of a
DS
high enough amplitude to allow the JFET to operate within its linear region,

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