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146 CHAPTER 4 / CACHE MEMORY

4.7 KEY TERMS, REVIEW QUESTIONS,AND PROBLEMS

Key Terms

access time hit ratio sequential access
associative mapping instruction cache set-associative mapping
cache hit L1 cache spatial locality
cache line L2 cache split cache
cache memory L3 cache tag
cache miss locality temporal locality
cache set logical cache unified cache
data cache memory hierarchy virtual cache
direct access multilevel cache write back
direct mapping physical cache write once
high-performance computing random access write through
(HPC) replacement algorithm

Review Questions
4.1 What are the differences among sequential access, direct access, and random access?
4.2 What is the general relationship among access time, memory cost, and capacity?
4.3 How does the principle of locality relate to the use of multiple memory levels?
4.4 What are the differences among direct mapping, associative mapping, and set-
associative mapping?
4.5 For a direct-mapped cache, a main memory address is viewed as consisting of three
fields. List and define the three fields.
4.6 For an associative cache, a main memory address is viewed as consisting of two fields.
List and define the two fields.
4.7 For a set-associative cache, a main memory address is viewed as consisting of three
fields. List and define the three fields.
4.8 What is the distinction between spatial locality and temporal locality?
4.9 In general, what are the strategies for exploiting spatial locality and temporal locality?

Problems

4.1 A set-associative cache consists of 64 lines, or slots, divided into four-line sets. Main
memory contains 4K blocks of 128 words each. Show the format of main memory
addresses.
4.2 A two-way set-associative cache has lines of 16 bytes and a total size of 8 kbytes. The
64-Mbyte main memory is byte addressable. Show the format of main memory
addresses.
4.3 For the hexadecimal main memory addresses 111111, 666666, BBBBBB, show the fol-
lowing information, in hexadecimal format:
a. Tag, Line, and Word values for a direct-mapped cache, using the format of Fig-
ure 4.10
b. Tag and Word values for an associative cache, using the format of Figure 4.12
c. Tag, Set, and Word values for a two-way set-associative cache, using the format of
Figure 4.15