Page 34 - DSP Integrated Circuits

1.6 DSP System Design 19

amount of design data, which otherwise would become unreasonably large. Large
amounts of data could be stored on a hard drive, but the processing time would
become excessive.
There are no direct methods or theories to cope with complexity in a problem
as such. The only remedy is to avoid the complexity by introducing some kind of
order. Fortunately, this can be done in many ways.
The complexity of a system can be measured in terms of the number of inter-
actions between its parts. More formally we have

where O is a set of objects with their functional description, F, and their interrela-
tions, R.
The potential complexity grows very fast when the number of parts is
increased. Therefore, complexity can be restrained or even reduced if the system is
designed so that it is partitioned into groups of low- or noninteracting parts. Com-
plexity is reduced if a set of parts that have a high degree of mutual interaction
(coupling) is collected into a module that has few external interactions. The reduc-
tion in complexity achieved by grouping several parts into a larger object (module)
that can be described by a simpler representation, describing only external com-
munication and without explicit references to any internal interactions, is called
abstraction.
The idea of hiding internal features of an abstracted module is fundamental to
building large systems. For example, in integrated circuits the internal details are
removed by the low-impedance drivers and the high-impedance input circuits. The
circuits can therefore be interconnected without electrical interaction if some sim-
ple fan-out rules are followed. Notice the similarity with current trends in com-
puter software where data and procedures are encapsulated into objects (C++).
Whenever a hier-
archy of information
exists, the information
can be subdivided so
that the observer can
examine the constitu-
ent parts and their
interrelation at a level
with less detail with
the aim of controlling
the information being
handled. Subdivision
often implies some tree
structures of relation-
ships, where at the
lowest levels of the
hierarchy the greatest Figure 1.19 Hierarchical representation of a 16-bit adder
detail is evident. This
hierarchy is illustrated in Figure 1.19 with a module that has two different classes
of cells: leaf cells and composition cells [8, 14]. The leaf cells contain low-level
objects (e.g., transistors or gates), while the composition cells represent higher-
level objects (e.g., full-adders, multipliers, RAM, and ROM).