Page 183 - Embedded Microprocessor Systems Real World Design

is increased because the CPU was doing something (such as a DMA transfer) that
had precedence over the interrupt. The third delay, area C, might be where the
CPU was executing another ISR when the timer interrupt occurred.
In this particular case, the best solution is to use a timer that can generate regular
interrupts. A more likely scenario in which that would not be possible is if the time
between interrupts must vary. In that case, this particular problem can be fixed by
using a timer with a holding register that can be loaded with a new count while it
is running and that starts using the new count when the current count expires.
When the interrupt is generated, the timer automatically starts the next count
and the ISR calculates the following count and loads it into the timer’s holding
register.
This example concentrated on timers, but the basic principle applies to any
system in which the software causes a timed value to vary. The basic rule is that, if
a cumulative error is unacceptable, the timing function (or at least the timebase)
must be performed in hardware. An example of an area in which cumulative timing
error does not create a problem is an RS232 interface implemented in software.
Since the receiver resynchronizes on each byte, a small error in bit-to-bit sample
timing is acceptable. On the other hand, in a timekeeping application, where time
of day must be maintained, an error of 1 count in 10,000 results in the time being
off by a full minute at the end of a week. This is unacceptable in most such
applications.
The time accumulation rule does not preclude software operation of functions
such as a real-time clock. It just means that the timebase, which generates the
regular timekeeping interrupts, must be maintained in hardware. This latency in
servicing interrupts limits the precision with which software can perform any timing
operation and must be taken into account in the design.

Multiple Reads

Suppose our polling loop has a piece of code that does this:

Read location X
If X = 0, do something
Read location X again
If X = 1, do something different
Read location X again
If X = 2, do a third thing
and so on

The intent is that only one operation will be performed for each pass through
the loop because X is not expected to change. Then suppose that an interrupt
occurs between the first and second read and that the ISR changes the value of X

164 Embedded Micrupocessar System