Page 377 - Embedded Microprocessor Systems Real World Design
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software, 22-24 hardware specifications, 288-290
PC/104 bus, 262-264 interrupts of, 155-156
PCI-based embedded boards, 261 pseudocode, 292-301
PC platforms, for embedded systems software description, 290-292
advantages of, 255-258 state diagram for, 122f
disadvantages of, 258-260 system description, 287
Peripheral component interconnect, 251 Port expanders, 59, 218
Peripheral ICs Power, for microprocessor, 15-16
data setup/hold time, 63 Prefetch queue, 271-272
functions, 59-63 Privilege levels, 285-286
interface ICs, 59 Processors. see Microprocessor
interrupt controllers, 59 Product requirements, 1
1/0 ports, 58-59 Program counter, 329
recovery time, 127 Programmable logic devices, 53, 101, 281
shared memory problem associated with, Programmable read-only memory. see
162 PROM
timers, 58 Programming, incircuit
280 peripherals, 61-62 description of, 14, 83
Peripherals, internal of flash memory, 3940,83-84
description of, 85 schematic representation of, 84f
DMA controllers, 77, 79, 85 PROM
interrupts generated by, 147 compiler information regarding, 137
types of, 85 electrically erasable. see EEPROM
watchdog timer. see Watchdog timer erasable. see EPROM
Phase-locked loop, 279 Harvard architecture and, 14
Pierce oscillator, 90, 92 one-time programmable, 39
Pins programmer, 18, 39
1% bus, 71 ROM. seeROM
I/O, 5-6, 29 Protocol converter
Pipeline queue, 271-272 description of, 236
Platforms, for embedded systems preemptive scheduling of, 241
CompactF'CI, 267 Pseudocode
description of, 255 advantages of, 123-124
ISA-based embedded boards, 261 description of, 123-125
PC example of, 124, 160
advantages of, 255-258 for pool pump timer system, 292-301
disadvantages of, 258-260 Pullups, for reducing RF susceptibility, 89
PC/104 bus, 262-264 Pulse-width modulation
PCI-based embedded boards, 261 description of, 6
STD bus, 265 outputs, 10
VME bus, 267 real-time events and, 9-10
Polling loop (s) schematic representation of, 9f
-DATA, 40 PWM timer, 110, 114
description of, 119-120, 235
function of, 120 Race condition, 162
length of, 11 RAM
multiple, 130 access time calculations, 4548
for pool pump timer system example, compiler information regarding, 137
297f-299f dual-port
priority of, 169 data corruption, 216,228
registers and, 136 data transfer methods, 215
single, 129 drawbacks to, 215
Pool pump timer system guidelines for using, 229-230
data flow diagram, 121f, 122f mechanism of operation, 212
358 Index
