Page 374 - Embedded Microprocessor Systems Real World Design
P. 374
&bit, 65 in real-time operating system, 247
electrostatic discharge protection, 88 timer resetting and, 163
I’C bus, 73 Interrupt vectors
ICs, 59 address, 146
JTAG, 284 description of, 144-145
microprocessor selection and, 6-7 generation of, 145, 145f, 154
Microwire, 73-74, 106f 1/0 (input/output)
16-bit, 65-68 control, 258
32-bit, 280 digital, 54, 286
Interleaving, 272-273, 274f microprocessor selection criteria and,
Interrupt (s) 5-6
acknowledge, 167 peripheral integrated circuits, 58
actions secondary to, 143-144 pins, 5-6, 29
bus cycles, 148 ports, 5-6, 58-59, 137
daisy-chained, 148-149, 155 schematic representation of, 55f
debugging effects, 169 simple, 54-55, 55f
definition of, 143 strobes, 55-56
description of, 9 ISR. see Interrupt service routine
edge-sensitive, 146, 151-153
estimating requirements for, 9 JTAG interface, 284
external, 147
externally vectored, 154-155 Kernel, 237, 251
function of, 9
hardware, 146-148 Language. see Development language;
high/low pairs, 165-1 66 High-level language
internal, 147 Latches
latencies, 11 D-type, 321
latency, 163f for extended data hold time, 64-65
level-sensitive, 146, 151 for I/O, 58
low-priority, 166-168 packaging of, 321
microprocessor selection and, 9 Latch input, 321
multiple reads and, 164-165 LCD, 20
nested, 146, 157-158, 178 LED, 20
nonmasking, 150 Level-sensitive interrupts
overusage of, 9 characteristics of, 151
prioritizing of, 146 definition of, 146, 151
protection against, 128-129 edge-sensitive interrupts and, compari-
race condition and, 162 son between, 151-153, 152f
in real-time operating system, 247 stuck, 160
reasons for using, 168 Light-emitting diode, 20
shared memory and, 160-162 Liquid crystal display, 20
software for, 155 Load capacitance, 90
stackup, 159, 159f Loading
stuck, 160 capacitance, 69
timer, 147, 153, 154f, 163-164, 178 data bus, 68-70
when to use, 168 Logic analyzer
Interrupt controllers breakpoints, 180-181
description of, 59, 145 description of, 177
vector response to, 145 Logic delays, 278
Interrupt service routine Logic functions
actions secondary to, 155-156 don’t care state, 316
data transfer to or from, 158 negative logic, 318-319
description of, 143-144, 147 set/reset flip-flop, 320
mechanism of operation, 155-156 simple logic gates, 316, 317f
Index 355
