Page 370 - Embedded Microprocessor Systems Real World Design

RTOS, 243 multiple inputs, 279-280
tristate, 106 phase-locked loop and, 279-280
Burst mode Clock rate vs. processor speed, 11
DRAM, 273-274 Clock-synchronized bus, 97-99
SDRAh4,276 CMOS, 92
Bus CMX-RTX, 252
address, 33, 35f Code
CAN, 218-220,220f assembly, 339
clock-synchronized, 97-99 formats, 339-340
data machine, 339
buffers, 69-70, 86 for multiprocessor systems, 205
description of, 33 partitioning of, 125-129
loading, 68-70 self-adapting, 125
&bit, 65, 129 size of, 132-133
I‘C Column address hold time, 49
buffering of, 217-218 Column address setup time, 49
characteristics of, 71-72 Communication between processors, in
development of, 72 multiprocessor systems
for interprocessor communication in asynchronous serial interface, 218
multiprocessor systems, 217-218 asynchronous serial port, 221, 222f-223f
Microwire and, comparisons between, CAN bus, 218-220, 22Of
74t description of, 204
schematic representation of, 71f, 71-72 FIFO buffers, 211-212
speed of, 72 message stackup problems, 212
multiple, 2 77-2 78 open-collector serial interface, 221
normally-not-ready, 36-37 parallel port interface, 221-224
PC/104,262-264 for processors on different boards, 218
PCI, 267 registers
IGbit, 65-68, 129 with DMA-controlled transfers,
sizing at reset, 96 207-21 1
STD, 265 fast/slow communication problems,
timing sequences, 32f, 34 210-211,211f
USB, 263 with flip-flop status, 206207, 207f
WE, 267 with interrupt input, 207
wait states and, 36-38 principles of use, 205-211
width, 129 selection criteria, 224225
Bus contention, 69, 316 serial communication, 21f3-218
Bus cycles CompactPCI, 267
description of, 34 Compiler
interrupt, 148 assembly support for, 133-134
Bus interface unit, 271 C. 131
chip select and, 136-137
C, 132, 341 emulator support for, 132
Cache memory, 278-279 function of, 341
CAN bus, 218-220, 220f microcontroller-based, 134
Capacitance loading, 69 optimizing, 133, 162
CAS access time, 49 RAM and, 137
Ceramic resonators, 92 Contact closure, 138
Chip select, 136-137 Context switching
Chopping rate, 9 description of, 136
Circular trace buffers, 178-179 registers, 157
Clock(s). see also Oscillators Controller ICs, 53-54
CPU, 110 Control store, 327
load capacitance, 90 Core dump, 182

Index 35 1