Page 368 - Embedded Microprocessor Systems Real World Design

Sile Step: A means, in either software or hardware, to cause a program to execute one
instruction and then stop. Single stepping may be at the machine level, where one CPU
instruction is executed, or at the level of a HLL, where one HLL statement (possibly many
CPU instructions) is executed.
Skew The condition that occurs when grouped signals (such as a microprocessor data bus)
do not all change at the same time. This term also applies to differences in the logic paths
inside a device, such as an address decoder. Even if the external signals change at the
same time, differences in the internal delays may cause the same effect as if the external
signals changed at different times. Skew usually is measured in nanoseconds.
Software: Computer instructions. This may refer to the source code or the actual machine-
readable data.
SRAM (Static RAM): RAM that is implemented as an array of flip-flops. Information is
retained until overwritten or until power is removed.
STD Bus: A bus architecture using a 56-pin edge connector. Originally intended for &bit,
64K processors, the STD bus has been expanded to include 16bit processors and
expanded addressing. STD-32 supports 32-bit processors and addressing.
Target: The system or microprocessor that an emulator is designed to install to or replace
when debugging.
TCB (Task Control Block): A memory area where an operating system stores information
about tasks under its control.
TCP (‘kansport Control Protocol): A transmission protocol for communication between
multiple processors. TCP provides full duplex operation and reliable connections by
venfylng delivery of data packets. TCP/IP is the protocol used for Internet com-
munication.
Time Sli- A scheduling technique in which a central scheduler switches tasks at regular
intervals, giving each task in sequence a specified number of time slices to execute before
going to the next task.
UART (Universal Asynchronous Receiver/Tnulsmitter): An integrated circuit or a circuit
that provides an asynchronous serial interface.
UDP (User Datagram Protocol): A transmission protocol, similar to TCP, that is used for
simple, fast transfers. UDP does not include features to guarantee delivery of a data packet
or to ensure that packets are received in the correct sequence.
Vector (Interrupt): A number or instruction that is translated into an address, which then is
executed to service an interrupt.
VME Bus: A bus architecture based on one to three 96pin DIN connectors. Originally
designed around the Motorola 68000 processor timing.
Von Neumann Architecture: A microprocessor architecture in which the code (instructions)
can share the same memory space as the data. Most microprocessors intended for
multichip designs use the von Neumann architecture.
WDT (Watchdog Timer): A timing circuit that resets or otherwise notifies a microprocessor
if it is not triggered at periodic intervals.

Glossary 349