Page 72 - Embedded Microprocessor Systems Real World Design

ADDRESS MAY BE UNSTABLE WHILE CHANGING
/\ RANGE DECODE OU7

A10
A9
-RD OR -WR A8
ADDRESS ONLY DECODE 8-INPUT NAND GATE DECODES UPPER 8
LINES OF A 16LINE ADDRESS BUS TO
DATA PRODUCE AN OUTPUT WHEN MICROPROCESSOR
ACCESSES LOCATIONS FFGU THROUGH FFFF
CONTROL DECODE
PULLUP
CHIP SELECTS FOR MEMORY AND OTHER DEVICES
WITH -0E AND -WE INWTS ONLY NEED TO DECODE 74AC 138
THE ADDRESS. CHIP SELECT SIGNAL MAY SWITCH A1 +M)
SEMRAL TIMES WHILE ADDRESSES ARE CHANGING. A2 +02
A3 +04
+06
+MI
+OA
WRITE STROBES FOR REGISTERS AND OTHER +0C
DEWCES WITHOUT SEPARATE -CE AND -RD OR -WR - R ~ ~ [ ~ ~ ~ $ ~ WE
SIGNALS NEED TO DECODE THE ADDRESS AND
-RD/-WR. THIS INSURES THAT THERE WILL BE
ONLY ONE TRANSITION ON THE CONTROL STROBE, 74ACT/LSS139 PRODUCES EIGHT OUTPUT
AND THAT IT WILL OCCUR WHILE THE ADDRESS STROBES FROM HIGHER-ORDER DECODER.
IS STABLE.
22VlO
-RD
[ E--E
h
-READ STROBE 2 (4004)
-READ STROBE 1 (4000)
b A9 -WRITE STROBE 3 (4002)
-WRITE STROBE 2 (401)
A10 -WRITE STROBE 1 (4OOO)
-PERIPH CS (3OOO-3FFF)
A2 -RAM CS (OOOOlFFF)
A1 -ROM CS (8-FFFF)
A0
22V10 PLD PRODUCES SEMRAL ADDRESS
DECODES AND 110 STROBES.
9
P
Figure 2.13
Address Decoding Circuits.