Page 76 - Embedded Microprocessor Systems Real World Design

Finally, the increasing power of microcontrollers makes them attractive where
simple 1/0 is needed. A typical design a few years ago might include an 80186 CPU,
memory, some kind of parallel I/O, and perhaps an ADC. Timer, interrupt control,
and serial interface could reside on the CPU chip (depending on which model) or
as external peripheral ICs. The same design today, with the same performance,
might use a microcontroller with everything embedded on<hip.
Although peripheral ICs are fewer now than in past years, they still exist and are
still useful in many designs. Most parts that are designed for a specific family of
processors can interface fairly painlessly to parts in that family. However, sometimes
the designer needs a function that is performed by a peripheral part from another
family. For example, you might want an interface between a Motorola peripheral
and an Intel processor. Although showing every possible combination of periph-
erals and microprocessors is impractical, some representative examples are illus-
trated here.

Intel 80188 to Motorola 68230 Figure 2.14 shows a simplified timing diagram
for the Intel 80188 and the Motorola 68230. On a read cycle (the address multi-
plexing does not appear in the figure for simplicity), the 80188 generates a -RD
strobe and the peripheral is expected to have data available at the trailing edge of
-RD (actually at the clock edge that precedes the end of -RD). For a write cycle,
the 80188 produces a -WR strobe and the write data is stable some time before the
trailing edge of -WR.
The 68230 has five register select inputs that are used to address internal regis-
ters. These are connected to the microprocessor address lines. The 68230 expects
a -CS signal, which is a logical AND of the address decode and data strobe. The
register select (address) inputs, the R/W signal, and the write data (for a write

CLOCK
l4TEL 80188
TIMING ALE I
I
-RO I > 3 READ CYCLE
OATAIN 7
-WR 1 WRITE CYCLE
DATAOUT -<

-CS I
MOTOROLA < >
88230 TIMING
-0TACK J
>
DATAWRITEI
DATA (READ) >

Figure 2.14
Intel 801 88 Versus Motorola 68230 Timing.

60 Embedded MicroprocRFsor Systems