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240               CHAPTER 6 / NONARITHMETIC COMBINATIONAL LOGIC DEVICES


                    CMOS devices consume the least power and then only during switching intervals — that
                    is, dynamic power dissipation. Thus, CMOS power consumption is frequency dependent
                    and may become quite large at very high frequencies. The bipolar families of devices (see
                    Appendix A) consume the most power, mainly due to leakage current, but are much faster
                    than CMOS. Other logic families tend to fall in between these two extremes.
                      A useful figure of merit for logic devices is called the power-delay product (PDF) given
                    by


                                            i L* r  =  r Consumption X fp(avg)i         (O.2.)

                    which is the product of the power consumed by the device and its average propagation delay
                    given by Eq. (6.1). The PDF of a device is sometimes called the speed-power product and is
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                    usually expressed in picojoules(l mW x 1 ns = 1 pJ = 10~  joules). Since it is desirable
                    for a given logic device to have both a low power consumption and a small propagation
                    delay, a low PDF is also desirable.

                    Noise Margins The noise margin of a logic device is the largest voltage that can be added
                    to or subtracted from the logic voltage and still maintain the required logic level. The noise
                    margins are defined as


                                              NML = V ILmaK - VoL max



                    and are shown in Fig. 3.2. The voltage parameters defined by manufacturers are expressed
                    as follows:

                         V/Lmax Maximum input voltage guaranteed to be recognized as LOW level.
                         VOL ma\ Maximum output voltage guaranteed to be recognized as LOW level.
                         VoHmin Minimum output voltage guaranteed to be recognized as HIGH level.

                                Minimum input voltage guaranteed to be recognized as HIGH level.

                    As an example, typical values for high speed (HC) CMOS are V//, max = 0.3 VDD,
                    0.7 Vbo, with VOL max being slightly above zero voltage and Vowmin being slightly below the
                    supply level V DD.
                      CMOS logic has always been considered as having good noise margins. However, in the
                    low submicron ranges, CMOS noise margins have been reduced to relatively low values.
                    The bipolar families are usually considered to have good noise margins. It is important that
                    the noise margins of logic devices be wider than any noise transients that may occur so as
                    to prevent unrecoverable errors in the output signals. Thus, noise margins may be regarded
                    as the margins of safety within which digital systems must be operated if their behavior is
                    to be predictable.

                    Fan-out and Fan-in Since the output from a switching device (for example, a gate) has a
                    definite limit to the amount of current it can supply or absorb, there is a definite limit to the
                    number of other switching devices that can be driven by a single output from that switch.
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