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278 MEMS and Microstructures in Aerospace Applications

12.5 MULTICHIP PACKAGING
12.5.1 MCM/HDI

Multichip packaging of MEMS can be a viable means of integrating MEMS with
other microelectronic technologies such as complementary metal oxide semicon-
ductor (CMOS). One of the primary advantages of using multichip packaging, as a
vehicle for MEMS and microelectronics, is the ability to efficiently host die from
different or incompatible fabrication processes into a common substrate. High-
performance multichip module (MCM) technology has progressed rapidly in the
past decade, which makes it attractive for use with MEMS.
The chip-on-flex (COF) process has been adapted for the packaging of MEMS. 7
One of the primary areas of the work was reducing the potential for heat damage to
the MEMS devices during laser ablation. Additional processing has also been added
to minimize the impact of incidental residue on the die. 8

12.5.1.1 COF/HDI Technology
COF is an extension of the high density interconnect (HDI) technology developed
in the late 1980s. The standard HDI ‘‘chips first’’ process consists of embedding
bare die in cavities milled into a ceramic substrate and then fabricating a layered
thin-film interconnect structure on top of the components. Each layer in the HDI
interconnect overlay is constructed by bonding a dielectric film on the substrate and
forming via holes through laser ablation. The metallization is created through
sputtering and photolithography. 9
COF processing retains the interconnect overlay used in HDI, but molded
plastic is used in place of the ceramic substrate. Figure 12.4 shows the COF process
flow. Unlike HDI, the interconnect overlay is prefabricated before chip attachment.
After the chip(s) have been bonded to the overlay, a substrate is formed around the
components using a plastic mold forming process such as transfer, compression, or
injection molding. Vias are then laser drilled to the component bond pads and the
metallization is sputtered and patterned to form the low impedance interconnects. 10
For MEMS packaging, the COF process is augmented by adding a processing
step for laser ablating large windows in the interconnect overlay to allow physical
access to the MEMS devices. Figure 12.5 depicts the additional laser ablation step
for MEMS packaging. Additional plasma etching is also included after the via-
drilling and large area laser ablations to minimize adhesive and polyimide residue
that accumulates in the exposed windows.

12.5.2 FLIP-CHIP
Controlled collapse chip connection (C4) is an interconnect technology developed
by IBM during the 1960s as an alternative to manual wire bonding. Often called
‘‘flip-chip,’’ C4 attaches a chip top-face-down on a package substrate as shown in
Figure 12.6. Electrical and mechanical interconnects are made by means of plated
solder bumps between bond pads and metal pads on the package substrate.

© 2006 by Taylor & Francis Group, LLC