Page 122 - Mechanical Engineers Reference Book

Microprocessors 3/5
3.2.3 Memory devices EPROM can be returned to its uncommitted state by exposing
the small ‘window’ in the device to intense ultraviolet light for
Memory devices consist of those used to store binary data, about 20-30 min. EPROM erasers are available for this
which .represents the user program instructions, and those purpose. Once programmed as required, it is usual to cover
which are necessary for the user to operate the system. the window with opaque material. If uncovered, it would
Memory takes the form of one or more integrated circuits.
normally take some months before program corruption was
These basically hold locations capable of storing a binary experienced through the effects of natural sunlight.
word. Each location is assigned a unique address within the A similar type of memory device is an Electrically Erasable
system and data can be selected through the address bus. As a Read Only Memory (EEPROM or E’PROM). This is essen-
binary code is deposited by the CPU on the address bus, tially similar to the EPROM but enables the user to alter any
defining a specific location in memory, the contents of that particular byte of data rather than wiping the entire chip.
location are selected and placed on the data bus. The E’PROM is not so popular as the EPROM for economic
appropriate piece of memory hardware and specific location is reasons.
selected by means of an address-decoding circuit built up from
logic gates within the microcomputer system. The end result is
a highly flexible data manipulation arrangement. 3.2.4 Input/ouEput (I/@ structure
In an 8-bit microcomputer (Le. 8-bit data bus) the address With the microprocessor acting as the brain of the microcom-
bus is 16-bits wide. This enables 216 = 65 536 locations to be puter system and the memory chips storing the system-
addressed, and the total memory capacity of the machine is operating software and application programs, the other essen-
said to be 64K. The memory is further sub-divided into pages tial hardware required is that associated with the input and
with the high-order byte of the address denoting the page output of data in essentially binary form. Interface support
number and the low-order byte indicating one of the 256 chips associated with the various microprocessor families are
locations available on each page. available to enable communication with such hardware essen-
In machines with 8086/8088 microprocessors an additional tials as keyboards, display monitors, disc drives and printers.
four bi1.s are effectively made available on the address bus. The same I/O interface circuits are used in measurement
This theoretically constitutes one megabyte of addressable and control applications and tke main functions required of
memory. Microcomputers such as the IBM-PS2, employing the devices are:
the 80286 and 80386 microprocessors, have an address bus
which is 24-bits wide and can address up to 16M bytes of 1. Digital I/O logic lines which can be read or set by the
physical memory. This releases new levels of processing power microprocessor;
to accelerate the processing speed in measurement and control 2. Data direction register to configure lines as either input or
applications. output;
The lypes of memory chips built into the system basically 3. Handshake lines to supervise data transfer via the I/O
divide into two categories: lines;
Random Access Memory (RAM), where data can be read 4. Timing and counting facilities.
from or written to any specified location. RAM is more
correctly defined as readiwrite memory and data retention The software used for controlling the communication be-
is dependent upon power being applied to the device. This tween the microcomputer and other external devices is depen-
type of memory is normally employed for the temporary dent upon the I/O interfacing technique employed. The two
storage of the computer programs, at the editing or most common methods are either ‘memory mapped’ or ‘dedi-
execution stage, or the storage of data from measuring cated port addressed’.
transducers prior to permanent storage as a disc file. In a
number of systems available, the RAM is made non- 3.2.4.1 Memory mapped 110
volatile by providing battery back-up.
Read Only Memory (ROM), where data are held in a In this method the I/O chip is connected into the system in the
secure manner and can be read in any specified sequence. same way as the memory illustrated in Figure 3.1. The IiO
Once the chip is configured it cannot be overwritten, and lines are contained in groups of &bits termed a ‘port’ and this
the programs which specify the system operation (termed byte is addressed in the same manner as any other location in
the monitor program) are ‘burnt’ into ROM when they memory. The port is accessed using memory transfer instruc-
are known to operate in a satisfactory manner. Basic tions like PEEK and POKE in high-level BASIC, or LDA and
ROM is inflexible since the software contained therein is STA in low-level 6502 assembly language.
developed by the system manufacturer. It is often useful, Since the interface is connected into the bus structure in
however, to have a11 programs which are to be perma- exactly the same way as the RAM and ROM, no additional
nently stored in the microcomputer in a non-volatile form, decoding hardware is required. Memory addresses are,
held in an Erasable and Programmable Read Only Me- however, used up for I/O. and as a result, communication is
mory (EPROM). This is undoubtedly the most popular slower than the port addressed alternative.
type of ROM used because the write process is reversible.
These chips are available in popular memory capacities of 3.2.4.2 Dedicated port addressed 110
2K, 4K, SK, 16K and 32K. and they are respectively
designated as 2716, 2732, 2764, 27128 and 27256. The This method involves a second dedicated I/O data bus as
numbers following the ‘27’ indicate the number of kilobits shown in Figure 3.2. When data are to be input or output the
of memory available within the device. necessary control signals are sent from the CPU to the I/O
interface chip and the port data are transmitted via the
EPROMs are supplied in an uncommitted form with each dedicated I/O data bus. This does not effect the addressing of
location holding FF hex. They are configured using an memory within the system and results in faster data transfer
EPROM programmer which ‘burns’ or ‘blows’ the required than with the memory mapped technique. The ports (or
data, in machine code form. onto the chip. If an error in the channels) are assigned unique addresses (numbers) on the
data exists, or an alteration is to be made, then the complete dedicated bus and are accessed using the additional software