Page 296 - A Practical Guide from Design Planning to Manufacturing
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266 Chapter Nine
but none is as inexpensive and easy to process as silicon. To provide uni-
form electrical properties throughout, the silicon must be almost totally
pure and a perfect crystal. In a crystal, the arrangement and spacing
of neighboring atoms around each atom are the same. This means that
the energy levels available to electrons will be the same throughout the
material. Defects in the crystal hinder current flow where it is needed
and allow current to flow where it is not needed.
The most common method for making silicon wafers is called
Czochralski (CZ) crystal growth (after its Polish inventor). A small
silicon seed crystal is dipped into a heated crucible filled with molten
silicon. As it is spun, the seed crystal is very slowly pulled from the
melt. Liquid silicon clings to the crystal, and as it cools it freezes in place,
causing the crystal to grow larger. The atoms naturally arrange them-
selves to follow the pattern of the original seed crystal. As the crystal is
pulled from the melt, a cylindrical crystal silicon ingot is formed, which
can be several feet long. By varying the pull rate of the crystal (typically
only a few millimeters per hour), the diameter of the ingot is controlled.
The largest ingots are up to 12 in (300 mm) in diameter. The ingot is
shaped to the correct diameter and sliced into circular wafers about 1 mm
thick. All the later processing will create circuits in just the top couple
of microns of the wafer. The full thickness of the wafer is required only
to allow it to be handled during processing without breaking.
The wafers must then be carefully polished to create an almost per-
fectly flat surface. A typical variation in height might be only a couple
of microns across a 300-mm diameter wafer. This would be equivalent
to a football field that varied in altitude by less than a hundredth of an
inch. This smoothness is critical for later photolithography steps, which
must be able to focus a clear image on the surface of the wafer. Wafers
produced in this fashion are called bulk wafers. These wafers can be
used directly for integrated circuit manufacturing or can go through
more processing to create different types of wafers.
It is extremely difficult to make silicon that is neither N-type nor P-type.
Almost inevitably, some impurities cause the silicon to have excess elec-
trons or excess holes. Rather than leave this to chance, N-type or P-type
dopants added to the melt ensure wafers with a specific doping level and
electrical resistivity. A low doping level makes it easy for later processing
steps to create regions of the opposite type from the bulk. If a P-type bulk
wafer is being used, then any region that is to be made N-type must first
add enough dopants to counteract the P-type dopants already in the
wafer. A low background doping makes precise control of the net doping
in each region after processing easier. However, CMOS circuits on lightly
doped wafers can be susceptible to latchup.
Latchup occurs when electric current flows between wells of different
types. This changes the well voltages and causes the heavy diffusion