Page 371 - Microsensors, MEMS and Smart Devices - Gardner Varadhan and Awadelkarim
P. 371

SAW-IDT  MICROSENSOR  FABRICATION   351

  remove  any excess  solvents  from  the photoresist. Then,  it is  cooled  to room  temperature
  for  approximately  15 minutes  before  exposing  it  to  UV  light  in  the  mask  aligner.
    A contact  mask  aligner  (Karl Suss MRK-3) is used  to align the positive  chrome  mask
  plate  with  the  quartz  that  is  wafer-coated  with the  photoresist.  A  UV  light  exposure  of
  6  seconds  is subsequently required.  The exposed  wafer  is then  developed  in a mixture of
  (ratio  1:4)  AZ–450® developer  (Hoechst)  and  deionised  water  for  40  seconds.  Great  care
  should  be  taken  at this  stage  because  under  or  overdeveloping  the  photoresist  layer will
  degrade  the  fabrication  success.  It  is  strongly  recommended  that  an  immersion  style  is
  adopted,  so that  the  wafer is  slowly  agitated  during the  developing  process  at  10 second
  intervals, followed  by a deionised  water rinse  and a close  inspection  using a  microscope.
  This  will provide  for  greater  control  in  the  important  developing  stage  of  fabrication. A
  'soft'  post  bake  is then performed  at 75 °C for  10 minutes, which assists in the  hardening
  and  formation  of  sharp  features of  the  photoresist.  The  wafer  is  then  allowed  to  cool  to
  room  temperature  for  approximately  15 minutes.  At  this  stage,  the  IDT  pattern  should
  have been  successfully transferred  to the  wafer;  if not, the  photoresist  can  be  stripped off
  in  acetone  and  the  entire  procedure  repeated  before  the  etching of the  wafer.
    Chemical  wet-etching  of  the  unwanted aluminum  is  then  performed.  The aluminum
  layer  is first etched  in  a solution  of  a commercial  etchant  and  deionised  water  (3.25  g of
  etchant  in  50  ml  of  deionised  water) at  room  temperature  for  approximately  60  seconds.
  The  etching  time  is  extremely  critical  because  undercutting  of  the  structure walls  may
  occur  if  prolonged  times  are  employed.  It  is  strongly  recommended  that  etching  is
  performed  at 10 second intervals, followed by a deionised  water rinse and close inspection
  with  a  microscope.
    The  temperatures  of  the  etchant  solutions,  together  with  the  thickness  of  the  metal
  layers,  are  important  factors  that have  a  significant  influence  on  the  etching  times.  It  is
  recommended  that the etching procedure  is inspected  for assurance before the processing
  of  valuable quartz  wafers.
    Once  the  IDT design  has  been  successfully transferred to the  metallised  wafer  via the
  etching process,  the  wafer  is ready  for dicing (Campbell  1996,  1998). The dicing  process
  is  described  briefly  in  Section  12.2.5.



  12.2.4.2  Lift-off  process

  The lift-off  process begins with an initial cleaning of the wafers, followed by the deposition
  of a positive photoresist.  A similar cleaning procedure to that used for the etching  process
  is used to remove  any possible  loose surface contaminants that may have appeared  during
  storage  since  the  initial  wafer-cleaning  procedure.  Similarly,  HMDS  is  spun  on  to  the
  wafer  using, for example,  a Headway Research  Inc.®  spinner at  3000 rpm for  60  seconds
  to  improve  the  adhesion  of  the  resist  to  the  wafer.  After  allowing  the  HMDS  thin  film
  to  sit  for  2 minutes,  AZ-1512® positive  photoresist  (Hoechst)  is  then  spun  at  3000 rpm
  for  30  seconds.  A  photoresist  layer  of  approximately  1.2 um  is  formed.  The  wafers  are
  then  baked  in  an  oven  at  75 °C  for  30 minutes  to  remove  any  excess  solvents  from  the
  photoresist.  The  wafers  are  cooled  to  room  temperature  for  approximately  15 minutes
  before  UV  light  exposure.
    After  aligning  the negative  IDT  chrome  mask  plate  with the photoresist-coated  wafer
  having  a  similar  orientation  to  that  used  in  the  etching  process,  the  wafer  is  exposed  to
   366   367   368   369   370   371   372   373   374   375   376