Page 209 - Modern Control of DC-Based Power Systems
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Control Approaches for Parallel Source Converter Systems     173


                 To guarantee Lyapunov stability the inequality _ V 2 # 0 has to be valid.
              Again, c 2 . 0 is a design parameter. This can be achieved by setting the
              term inside of the brackets to zero. Combining Eqs. (5.167) and (5.168)
              leads to a duty cycle:


                           L f C f  x 1  x 2 R f  2
                       d 5             1      1 ðc 2 1Þz 1 2 ðc 1 1 c 2 Þz 2
                                                  1
                             E    L f C f  L f C f
                                                           _
                                   x 2     x 1      I d    _ I d
                               1       2       2        1    Þ          (5.169)
                                           2
                                 R L C 2  R C 2   R L C 2  C f
                                     f     L  f       f
                 The duty cycle is also the final control law for the virtual disturbance
              Backstepping procedure. This leads to:
                              _ V 2 5 _ V 1 1 z 2 _z 2
                                       2
                                       1
                                                   ð
                                52 c 1 z 1 z 1 z 2 1 z 2 2 c 2 z 2 2 z 1 Þ  (5.170)
                                             2
                                       2
                                52 c 1 z 2 c 2 z , 0;  z 1 ; z 2 6¼ 0:
                                       1     2
                 Therefore, ensuring Eq. (5.169) guarantees that the derivative of the
              Lyapunov function V 2 is less than zero. According to the Lyapunov direct
              method, this means that the system is asymptotically stable around the
              point where the voltage equals the reference voltage. It is noteworthy that
              the tuning of the design parameters c 1 and c 2 influences how much each
              state overshoots. An example can be given by decreasing the design
              parameter c 1 , which has as a consequence a slower convergence of the
              voltage and less overshoot in the inductor current, since the weight of
              error z 1 is also decreased.
                 A very interesting conclusion can be taken when rewriting (5.170):
                                    _
                           2
                                 2
                       2c 1 z 2c 2 z 5V 2 #2 2θV 2 ;                    (5.171)
                           1     2                 θ 5 minðc 1 ; c 2 Þ
                 Therefore (5.171) is described by an exponential function, which
              means that V converges exponentially fast to zero, and as z 1;2 are the
              error variables consequently the error converges exponentially fast to
              zero. This has consequences for (5.158), which represents the deviation of
              the bus voltage from V ref , where the steady-state error disappears. This
              implies that the DC bus is tightly controlled. Extending this thought to
              (5.164), which represents the current, implies that the disturbance current
              I d , which is the reference, is perfectly tracked. Taking now into account
              (5.163), (5.166), and (5.170), where V is positive definite and _ V is
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