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integrator 325
ensure that the reactance of Q is less than 10 percent of the value of R 2 at the low-
est frequency of operation. This makes certain that the majority of the current will
be used to charge and discharge Q.
7.6.2 Numerical Analysis
Let us analyze the circuit shown in Figure 7.21 and determine the following circuit
characteristics:
1. Lowest frequency of operation
2. Highest frequency of operation
Many other characteristics (e.g., input and output impedance) are analyzed in the
same way as a simple inverting amplifier (Chapter 2).
Lowest Frequency of Operation. The lower frequency limit of the integrator
circuit shown in Figure 7.21 is the frequency that causes the capacitive reactance of
C] to be equal to one-tenth of jR 2- This is computed with the basic capacitive reac-
tance equation.
6.28 x 0.01 fjF x 27 fcO
= 590 Hz
This is not an ultimate limit, however. As the frequency is reduced below this
value, the operation of the circuit becomes progressively less like an integrator
and more like an inverting amplifier. Finally, at DC, it is an inverting amplifier.
Highest Frequency of Operation. The upper frequency limit is dependent
on the characteristics of the op amp. In particular, the upper operating frequency
will be the lower of the frequencies that are established by the bandwidth or slew
rate of the op amp. Both of these considerations were discussed in greater detail in
Chapter 2. For many applications, however (including worst-case design consid-
eration), the upper limit will be set by the slew rate of the op amp. This is com-
puted with Equation (2.11) as