Page 287 - Phase-Locked Loops Design, Simulation, and Applications
P. 287
previous example, the one-bit ADC is replaced by a summing block. The quantized output
signal U is considered to be the sum of input signal U and error sequence e. Because the
i
Q
DAC in the feedback path has a gain of 1, the output U can now be connected directly with
Q
the inverting input of
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