Page 44 - Power Electronics Handbook

The IGBT 37

The on-resistance (T~s(~~)) the device is given by equation (1.13),
of
where Rfb is the resistance of the channel beneath the gate; Re, is the
resistance of the substrate, solder connections, leads and package; and Rbk
is the resistance between the two p layers and the drain, through the body
of the vertical transistor.
TDS(ON) = Rbk -I- Rch + Rex (1.13)
The channel and external resistances are constant but the bulk resistance
increases with the breakdown voltage of the device. Therefore the
on-resistance will also increase as the breakdown voltage capability of the
transistor increases. To avoid this, large chips are constructed using many
identical parallel cells, which give a low on-resistance and a high
breakdown voltage.
The shorter the gate channel in a unipolar device, the higher the
transconductance and the lower the parasitic capacitance. The maximum
frequency of operation cfmu) is given by equation (1.14), where W, is the
length of the channel in micrometres and V, is the camer velocity in cds.

(1.14)
Figure 1.21(b) shows a short-chamel arrangement which is formed byp
and n diffusions, hence it is often called a double-diffused (DMOS)
transistor. As the drain-source voltage is increased the depletion layer
spreads into the drain drift region since it is lightly doped. Since the drain
drift region is increased the breakdown voltage is higher, but the
drain-source resistance also increases. This can be reduced by using several
parallel cells on the semiconductor die.
Figure 1.21(c) shows part of the short-channel transistor of Figure
1.21(b), with an illustration of the parasitic components. The action of the
parasitic transistor is usually avoided by a metal contact which bridges the
source and the body, i.e. the base and the emitter of the parasitic
transistor. Therefore theoretically this transistor should be off, but since
the ohmic p layer puts a resistance into the base of this transistor it is
possible to turn it on, for example via the parasitic capacitance (C,) which
can destroy the device. The parasitic capacitance is formed by the p base
and the n drift region. The parasitic diode is useful when switching
inductive loads.
The V-groove MOSFET or VMOS device, is shown in Figure 1.21(e). Its
operation is identical to the DMOS structure except that it is a vertical
structure, and there are now two parallel paths down to the drain. The metal
gate shown in the figure is also usually replaced by a silicon gate.

1.7 The IGBT
The insulated gate bipolar transistor (IGBT) is a hybrid device which aims to
combine the benefits of power MOSFETs, such as low input current drive
and wide safe operating area, with the advantages of bipolar transistors, such
as low saturation voltage (IR, 1992; Goodenough, 1994; Bush, 1996). Figure
1.22 shows the basic construction of this device, with its equivalent circuit
and symbol.