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                                                                 6.3. Quantum Dots, Quantum Wires
                                                    X
                                                         ∆E
                                                                 (a)
                                                                  3
                                                         2
                                                1
                                                                  4
                                                                  (b)
                                          Energy level diagram of the single electron transistor.
                               Figure 6.13.
                                  QUANTUM DOTS, QUANTUM WIRES
                             6.3
                             In this final section, we describe some common methods of
                             synthesizing low dimensional nanostructures.  In general, the   131   ch06
                             approaches adopted to fabricate nanostructures can be classi-
                             fied into top-down and bottom-up methods. In the top-down
                             approach, the size of bulk materials is gradually reduced to the
                             nanometre scale by using etching techniques with the help of var-
                             ious lithography techniques. This method has proven to be a great
                             success in the highly developed semiconductor industry. On the
                             other hand, the bottom-up method utilises the self-assembly of
                             basic building blocks into nanostructures and such a process can
                             be controlled by the growth dynamics. Depending on the form of
                             the building blocks, the bottom-up method can be further divided
                             into solution-based or vapour-based routes.
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