Page 300 - Semiconductor Manufacturing Handbook

Geng(SMH)_CH19.qxd 04/04/2005 20:00 Page 19.27

INSPECTION, MEASUREMENT, AND TEST

INSPECTION, MEASUREMENT, AND TEST 19.27

represent the results of one channel. Digital capture functionality requires the ability to capture only
the relevant sample bits within this frame to reduce the unnecessary overhead of capturing and post-
processing the unnecessary 236 bits per sample. For adequate dynamic test coverage, the digital cap-
ture rate must be able to operate at the maximum frequency at which the device under test samples.
As in digital and memory devices, there is a requirement of digital vector drive/compare, digital
capture, and PMU capability on the same DUT pin depending on which mode it is in for a specific test
in the flow. Therefore, the trend in the ATE industry has been toward a solution that provides this capa-
bility on a per-pin basis to reduce the necessity of multiplexed tester resources. By providing advanced
per-pin architectures with these capabilities native to each pin, cost and performance are optimized.
Digital source memory (DSM) is the ability to segment a portion of digital vector memory as a
contiguous block of data that can be called from standard test vectors. In most cases this memory is
utilized in frame-based, serial device interfaces. This capability simplifies the effective management
of source waveforms for DAC testing. Similar to capture memory, the necessary size is relative to the
resolution and number of waveforms to be sourced. As this capability is used primarily in frame-based
interfaces, the speed requirements are not stringent. In the current market, devices that require speeds
of over 50 MHz do not have frame-based interfaces and as such do not require DSM capability.
Analog subsection. There are two analog module requirements for mixed-signal tests—
waveform generators and digitizers. Both are usually specified by their resolution and sample rate.
An arbitrary waveform generator (AWG) provides a sample memory that the user programs to
allow the generation of any type of waveform that can be defined mathematically. Output frequency
changes can be accomplished by either modifying the sampling clock or waveform data. The sam-
pling clock of the AWG can be derived from a common master clock with digital vectors to ensure
coherency, or from another master clock. Usually in mixed-signal testers at least two master clocks
are provided for supporting multiple frequency combinations in tests.
Waveform digitizers sample the device-generated analog output and store the discrete voltage
values in the local memory. A local DSP within the digitizer will then calculate the performance rel-
ative to the specifications and return the results to the user’s computer. For cases of sampling a wave-
form whose frequency is over the maximum available Nyquist frequency of the digitizer,
undersampling can be utilized. This methodology takes advantage of a high input bandwidth of the
measure unit to alias the signal of interest into the spectrum. A digitizer that utilizes this sampling
methodology is referred to as a sampler and is usually specified by bit resolution and bandwidth at
the −3 dB cutoff point.
Many mixed-signal implementations have multiple functional blocks. As such, ATE test
resources must provide an autonomous test capability within each tester module to enable parallel
testing with minimal overhead. This capability within each module, as shown in Fig. 19.9, includes:
Analog sequencer: Similar to the digital pin sequencer, the analog sequencer steps through a
series of instructions to control the operation of the module. It is in effect an address generator
for access to the AWG or digitizer memory locations. This allows an AWG to repeat a block of
waveform or switch waveforms from one cycle to the next (OTF), and a digitizer/sampler to do
multiple measurements sequentially without any interruption from the system.
Memory: These comprise AWG source or digitizer capture waveform memory within the mod-
ule. For complex mixed-signal devices such as multimedia, cellular phones, and hard disk drives,
test signal waveforms can be long and require many different stimuli and measurement segments
requiring deep memory.
Digital signal processor: A local DSP provides the ability to calculate results without requir-
ing the transfer of the capture results to the tester controller workstation for processing. FFTs and
filtering are the most common operations.
Parallelism: There is an architectural advantage to having multiple autonomous units to provide
multisite and parallel IP block testing capability.
Other necessary pieces to the architecture include highly accurate dc source and measure capa-
bility to be used for voltage and current setup and measures. A per-pin architecture is the most flex-
ible and contributes to parallelism that is necessary to satisfy COT economics.

Downloaded from Digital Engineering Library @ McGraw-Hill (www.digitalengineeringlibrary.com)
Copyright © 2004 The McGraw-Hill Companies. All rights reserved.
Any use is subject to the Terms of Use as given at the website.