Page 13 - Wire Bonding in Microelectronics
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xii   Co n t e n t s


                          9.1.2  The Requirements for High-Yield
                                Bonding (Metallization Surface,
                                Hardness, Cleanliness)   . . . . . . . . . . . .   295
                          9.1.3  The Bonding Machine and Its
                                Control   . . . . . . . . . . . . . . . . . . . . . . . . .   299
                          9.1.4  Reliability for Small Numbers of
                                Bonds (Small Sample Statistics)   . . . .   300
                          9.1.5  Package Related Bond-Yield Issues   . . .   301
                          9.1.6  Possible Yield Problems and
                                Solutions   . . . . . . . . . . . . . . . . . . . . . . . .   302
                          9.1.7  Other Considerations That May
                                Affect Overall Device Yield   . . . . . . . .   304
                          9.1.8  Wire Looping    . . . . . . . . . . . . . . . . . . .   305
                          9.1.9  Fine-Pitch Ball and Wedge Bonding  . . . .   307
                         9.1.10  Reliability and Testing Problems of
                                 Fine-Pitch Bonding   . . . . . . . . . . . . . . .   310
                                Area Array Wire Bonding   . . . . . . . . .   314
                         9.1.11  Conclusions of High Yield and
                                 Fine Pitch   . . . . . . . . . . . . . . . . . . . . . . .   315
                     9.2  Wire Bonding to PC boards, Flex, BGAs,
                         MCMs, SIPs, and Various Soft Substrate Devices
                         and High-Performance Systems   . . . . . . . . . . .   315
                          9.2.1  Introduction   . . . . . . . . . . . . . . . . . . . . .   315
                          9.2.2  Bonding to Thin-Film Dielectric
                                Substrates   . . . . . . . . . . . . . . . . . . . . . . .   316
                          9.2.3  Bonding to Laminate Substrates,
                                Such as PCBs, BGAs, SIPs, and
                                Buildup Layers   . . . . . . . . . . . . . . . . . .   319
                          9.2.4.  Buildup Layers   . . . . . . . . . . . . . . . . . .   321
                          9.2.5  The Effect of a Polymer Substrate’s
                                Material Properties on Wire
                                Bonding   . . . . . . . . . . . . . . . . . . . . . . . .   322
                          9.2.6  Additional Considerations When
                                Using Wire Bonds in Packages Running
                                at High Clock Rates in High-
                                Performance Systems (HPS)   . . . . . . .   327
                          9.2.7  Skin-Effect in Typical Package/Board
                                Conductor Metal Structures   . . . . . . . . .   327
                          9.2.8  Conclusions     . . . . . . . . . . . . . . . . . . .   329
                     9.3  Wire Bonds in Extreme Temperatures/
                         Environments    . . . . . . . . . . . . . . . . . . . . . . . . . . .   330
                          9.3.1  Introduction   . . . . . . . . . . . . . . . . . . . . .   330
                          9.3.2.  High Temperature Interconnection
                                 Requirements   . . . . . . . . . . . . . . . . . . .   330
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