Page 362 - ARM 64 Bit Assembly Language

352 Chapter 10

Name Effect Description
{r}<op>hn2 shif t ← size ÷ 2 The operation is applied to corre-
if r is present then sponding elements of Vn and Vm.
x ← Vn[]<op>Vm[] The results are optionally rounded,
Vd[] ← x shif t ≺ then narrowedbytakingthe most
else significant half, and stored in the
x ← Vn[]<op>Vm[] corresponding elements of the up-
Vd[] ← x shif t ≺ per 64 bits of Vd.
end if

10.6.2.3 Examples

1 addhn v1.2s,v6.2d,v8.2d // Add and narrow
2 rsubhn v4.8b,v5.8h,v3.8h // Subtract round and narrow

10.6.3 Add or subtract and divide by two

These instructions add or subtract corresponding integer elements from two vectors, then shift
the result right by one bit:

hadd Vector halving add,
rhadd Vector halving add and round, and
hsub Vector halving subtract.

The results are stored in corresponding elements of the destination vector.

10.6.3.1 Syntax

(s|u){r}hadd.<type> Vd.T, Vn.T, Vm.T
(s|u)hsub.<type> Vd.T, Vn.T, Vm.T

• If <r> is specified, then the result is rounded instead of truncated.
• T must be 8b, 16b, 4h, 8h, 2s,or 4s.