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2. PV System Under Nonshading Conditions     143




                  maximum input voltage acceptable by ADC circuits. The values of BOOS_RDIV3
                  and BOOST_RDIV4 must be selected to satisfy the following relation:
                                             Boost RDIV4
                                                                                (4.27)
                               V PV max                          V ADC max
                                      Boost RDIV3 þ Boost RDIV4
                                                                   is the maximum ADC
                  where V PV max  is the maximum PVoutput voltage and V ADC max
                  acceptable input voltage. The scaled voltage is low-pass filtered and buffered using
                  the amplifier circuit shown above before passing to the ADC input. The amplifier
                  device used here is MCP601-XST from Microchip. The MCP601-XST is a low-
                  cost and simple-to-use Op-Amp; it requires a single voltage supply and provides
                  rail-to-rail output. The device has a wide bandwidth and is optimized for ADC cir-
                  cuits driving.
                     The PV-sensed voltage is the voltage at the PVarray terminals, which is the input
                  to the boost circuit. To minimize the noise in the power circuits generated by the
                  high-speed digital circuits (FPGA control board), the PV ground (boost ground) is
                  isolated from the control ground (FPGA board, sensing and switch driving ground)
                  by a ferrite bead as shown above.

                  2.3.2.4 PV Current-Sensing Circuit
                  The PV current has to be sensed and passed to the FLC. The PV current is first
                  sensed by a current sensor ACS754XCB-150. This device is a hall effectebased
                  linear current sensor capable of sensing ac and dc currents with a peak up to
                  150 A. The sensor output is a positive voltage swing between 0 and þ5 V propor-
                  tional to the sensed current. The output of the sensor V sens at a given sensed current
                  I sens can be calculated from the following relation:
                                                          2:5
                                         V sens ¼ 2:5 þ I sens                  (4.28)
                                                          150
                  where, I sens can have any value between þ150 and  150 A. Because of the fact that
                  the PV array is a dc power supply and the output current cannot have a negative
                  value, the sensible 0 to  150 A current range is not required and can be ignored.
                  The sensor has a sensitivity of 14 mV/A.
                     The second stage of the current-sensing circuit is an amplifier and low-pass filter
                  circuit. Because the PV array current may not reach the beak of þ150 A, the ampli-
                  fier amplifies the produced output voltage from the current sensor so it’s measurable
                  by the ADC circuit.
                     The amplifier circuit subtracts the þ2.5 Voffset generated by the current sensor
                  (at 0 A) before amplifying the sensor output and this is why the amplifier is orga-
                  nized as a difference amplifier. The amplification is controlled by two resistors
                  R in and R f and these resistors can be selected according to the maximum PV current
                  to be sensed and the maximum acceptable ADC input voltage. R f and R in selected
                  values must satisfy the following relation:
                                                14   R f
                                        I sens max
                                                                                (4.29)
                                                        V ADC max
                                              R in
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