Page 405 - Analog and Digital Filter Design

402 Analog and Digital Filter Design

This can be simplified by multiplying everything by the highest power denomi-
nator, which is (z + 1) squared, or (z' + 2z + 1).

The equation then becomes:

(2 +2,.+1)
H(z)= 0.0576378.(z2 - 22 + 1)+0.3395227.(2' - 1)+ (2' +2z + 1)

Now z-' is a single clock cycle delay, which can be achieved easily in digital
systems. The equation can be restated in terms of delays by multiplying top and
bottom by z-', giving:

(1 + 22-1 + 2-2)
H(z) =
0.0576378.(1-2~-' +~-')+0.3395227.(1-~-')+(1+2~-' +F')
Collecting terms on z-I, z-', and so forth, to give us coefficients for each delay
term. this becomes:

(1 + 22-1 + z-')
H(z) =
1.3971605 + 1.88472442-' + 0.7181 Mz-'
This equation can be compared to the equation for the biquad that follows:

Y(z) AO+Al.z-I +A2.,7-'
H(z) = -
-
-
X(Z) l-Bl.~-' -B2.Y2
The first term in the denominator is required to be 1.0 instead of 1.3971605, so
all terms in the equation must be divided by 1.3971605. Also the last term in
the denominator should be subtracted, so B2 must be a negative value. Carry-
ing out these changes gives:

0.7157374 + 1.4314748. z-I + 0.7157374.2"
H(z) =
1 - (-1.3489677. 2-' ) - (-0.5 1398 18. T')

Now this means that the coefficient values are A0 = 0.7157374, A1 = 1.4314748,
A2 = 0.7157374, BI = -1.3489677, and B2 = -0.5139818. This completes the
design process using method 1.

Design Method 2
In the second lowpass ater method, s is replaced by:

s= cot(w,,/2).[-l] ,.+I