Page 233 - Complete Wireless Design

Oscillator Design

232 Chapter Four

1. Choose a proper high-frequency transistor with an f that is much higher
t
than the oscillation frequency (Q is normally selected to have an f of about
1 t
5 times that of f ).
OUT
2. Bias the active device Class A:
a. Choose the supply voltage. Select a Q point for the transistor that is
consistent with the available S-parameter file for I and V . Example:
C C
I 10 mA; V 6 V; V 12 V. Find the transistor’s typical , such
C C CC
as 50.
b. Calculate I I /
B C
c. Calculate
R (V 0.7/I )
b C C
d. Calculate
V V
CC
C
R
C I I
B C
3. Calculate the component values for the LC resonator of the oscillator:
190 1 1
L C C C C 1 ohm (X )
2 f 1 48 f 2 48 f C B C
1
C
D1
300 f
4. Calculate
2500
R
f
(0.025/I )
C
(R should be tweaked in the preliminary open-loop S-parameter analysis
f
until both the input and output of the oscillator are close to 50 ohms on the
simulator’s Smith chart.
5. C ≈ 50 to 200 ohms (X ) for a 50-ohm load. Find the necessary value
COUP C
of C by simulating the oscillator into a 50-ohm load, and use the lowest
COUP
C reactance value that will still allow the oscillator to maintain a
COUP
decent gain margin ( 5). If a high input impedance buffer amplifier follows
C , then C C (however, phase noise will go up).
COUP COUP C
6. Simulate and optimize as explained in Sec. 4.1, “Oscillator Simulation.”
Notes. L and the capacitance of the varactor, D , are near series resonance, while
1
C and C act as coupling capacitors to obtain 180 degree phase shift with L and D
1 2 1
(with a high Q). R , with its DC decoupling capacitor (C ), feeds back some of the RF
f
C
into the oscillator’s input in order to diminish low-frequency gain for stabilization of
the BJT, as well as to lower both the input and output impedance of the oscillator
closer to 50 ohms. This not only makes it easier to simulate in a 50-ohm
environment, but also in a real environment with a vector network analyzer (VNA).

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