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8.6 Message-Based Architectures                                      371

        8.6 MESSAGE-BASED ARCHITECTURES


        As mentioned before, each processing element (PE) in a multicomputer has its pri-
        vate memory. The PE—memory pairs are connected to certain neighboring proces-
        sors via links. Communication between the processors occurs by passing messages
        between the processors (nodes). Multicomputer architectures are therefore often
        called message-based architectures. A message can be communicated only over a
        link that connects two nodes, and a given message may have to pass through sev-
        eral such nodes before it raches its destination. Hence, the distance between pro-
        cessors is not constant. Only those algorithms that can be partitioned into parts
        having low interprocessor communication needs are well suited to multicomputer
        architectures, since each interaction involves some communication overhead.
            Shared-memory architecture is more versatile than direct link architecture,
        but it may be more expensive for architectures with many PE-memory pairs. A
        direct link architecture is shown in Figure 8.15.














                             Figure 8.15 Direct link architecture



        Usually, it is argued that the best choice is
            Tens of PEs -> shared memory
            Hundreds of PEs  —» hybrid
            More than hundreds of PEs -> direct link
            The term processor array is used when the processing elements are connected
        in a regular manner [7]. A processor array is a block of memory with processing
        elements distributed among it. The processors usually execute different types of
        operations. This should not be confused with the term array processor. An array
        processor is an array of processing elements doing the same operation but on dif-
        ferent data items. The array is usually controlled by a common master processor.
            A common way to classify architectures is single or multiple instruction
        stream, or single or multiple data stream. There are four combinations. SISD (sin-
        gle-instruction stream and single-data) architectures represent the classical serial
        computers. In MISD (multiple-instruction stream, single data) architectures, mul-
        tiple instructions operate on a single datum. This case is generally deemed
        impractical. A more practical case is SIMD (single-instruction stream, multiple-
        data) architectures. SIMD architectures are particularly suitable for applications
        with high data parallelism, such as image processing. In MIMD (multiple-instruc-
        tion stream, multiple-data) architectures, multiple processors operate on different
        data.
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