Page 471 - DSP Integrated Circuits

456 Chapter 10 Digital Systems

By multiplying by D(n+2), we get two equations: one for c(n) and one for c(n).
These equations are complementary—i.e., one and only one equation evaluates to
true. The equation for c(n) is the same as the equation for the carry term of a 2-bit
adder. This method is equivalent to using the periodic scheduling formulation
over two sample periods discussed in section 7.5.4.

10.7.2 Concurrent Block Processing
Another method with lower hardware complexity is based on concurrent calcula-
tion of blocks. By buffering and dividing the input into concurrently computed
blocks, the throughput can be increased. Each block computation must, however,
be made independent of the others. There are two ways to achieve this indepen-
dence. Consider the state trellis diagram in Figure 10.32.

Figure 10.32 State trellis diagram

Block precomputation, as illustrated in Figure 10.33, uses look-ahead tech-
niques to calculate the initial state for each block before the output value is calcu-
lated. Concurrent calculations using the original FSM algorithm can then be
performed in each separate block.

Figure 10.33 Block precomputation

Block postcomputation, as illustrated in Figure 10.34, is useful if the FSM has
a moderate state size. For every possible initial state the resulting output