Page 526 - DSP Integrated Circuits

11.16 Reducing the Memory Size 511

Notice, depending on the values in the ROM, it is often favorable from both
speed and area points of view to implement a ROM by PLAs. Large ROMs tend to
be slow.

11.16.2 Memory Coding
The second approach is based on a special coding of the ROM content. Memory
size can be halved by using the ingenious scheme [7,11] based on the identity

In two's-complement representation, a negative number is obtained by invert-
ing all bits and then adding a 1 to the least significant position of the original
number. The identity can be rewritten

Notice that x k - x k can only take on the values -1 or +1. Inserting this expres-
sion into Equation (11.46) yields

The function Fk is shown in Table 11.4 for N = 3. Notice that only half the val-
ues are needed, since the other half can be obtained by changing the signs. To
explore this redundancy we make the following address modification shown to the
right in Table 11.4:

Here, we have selected variable x\ as the control signal, but any of the vari-
ables will do. The add/sub control (i.e., x\) must also provide the correct addi-
tion/subtraction function when the sign-bits are accumulated. Therefore, we form
the following control signal to address the ROM: