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method of buffering an 1% bus involves a circuit that senses current flow to deter-
mine whether a device is trying to drive the line and turns on the right buffer to
send data the right direction.
Some microcontrollers, such as the 8051, have synchronous serial ports that are
suitable for interprocessor communication. These generally run at a fairly high sub
multiple of the processor clock for fast data transfer. Since they usually are half
duplex, a handoff protocol must be established for bidirectional communication.
Processors on Different Boards
In systems where two processors on separate boards need to communicate, several
methods are available. A serial -232 link has already been discussed. Some port
expander ICs, such as the 28536, have a built-in communication mode where 8 data
bits of one port and 2 or 4 bits of another port can be interconnected between two
devices to make a byte-wide interface with interlocked handshake. If the commu-
nication distance warrants, the interface can be made differential or otherwise
noise immune.
An asynchronous serial interface can be used without the -232 interface. Some
high-speed UARTs can operate up to 1 Mbit per second. If an RS-485 differential
interface is used as illustrated in Figure 8.8, several processors can be connected in
a high-speed party line arrangement. Note that the -485 party line communica-
tion bus can be quite long and interconnect subsystems over significant distances.
Although not covered in detail here, more complex communication schemes
involve Ethernet, Firewire, or other standard, high-speed interfaces.
CAN Bus
The CAN (controller area network) is a serial bus originally developed for use in
motor vehicles. It is a multimaster bus that supports multiple, equal nodes. The
nodes have no specific address. Address information is contained in the identifiers
of the transmitted messages. Nodes may be plugged in and removed while the
system is operating (“hot swapping”).
The CAN bus is a 120-ohm differential serial party-line bus. Three bus speed
ranges are available:
1. & 2. Low speed (ISO-IS 11519-2) defines a Class A bus with speeds up to IOkbps,
and a Class B bus for speeds from lOkbps to 125kbps.
3. The high-speed specification (ISO-IS 11898) defines a bus with speeds between
125 kbps and 1 Mbps.
CAN uses NRZ (nonreturn to zero) signaling, with bit-stuffing to allow resyn-
chronization. The CAN differential lines have two states: In one state, both lines
are driven to 2.5V and in the other state one line is driven to 1.2V and the other
to 3.5V. This gives a differential voltage swing between 0 and 2V.
218 Embedded Microprocessor Systm