Page 57 - Embedded Microprocessor Systems Real World Design
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The last type of memory is ROM. As mentioned in Chapter  1, this is memory
                  programmed by the IC manufacturer using a mask. It cannot be reprogrammed
                  and usually is used in singlechip microcontrollers, although mask ROM versions
                  of some EPROMs are available. ROM normally is used only in very high-volume
                  applications where the code is not expected to change over the life of the product.

                  EPROlWFIash Interfacing

                  When reading a flash memory, you’ll note that it has the same characteristics as an
                  EPROM, so the interfacing  techniques for an EPROM and flash are identical in
                  that respect. Typical EPROMs have three inputs: The address inputs, which can be
                  up to 18 bits; a chip select; and an output enable. The only outputs are the 8 or 16
                  data bits  back  to  the  microprocessor. Figure  2.5  illustrates the  EPROM  timing
                  diagram. The address is presented to the EPROM and the chip select is driven low.
                  Until the access time has elapsed, the output data is undefined. After the access
                  time has elapsed, the output data for the addressed location is available. The output
                  enable signal turns on the tristate EPROM outputs, driving the data onto the micro-
                  processor data bus.
                     The chip select signal comes from the address decoding logic connected to the
                  microprocessor data bus. Some processors, such as the 80188/80186  family, have
                  internal, programmable chip select logic. The chip select signal in those cases can
                  come directly from the microprocessor itself.
                     Note that the address must be stable for the entire EPROM access cycle. If the
                  address changes during the cycle, the outputs also change as the EPROM attempts
                  to access the data at the new address. This is why the address must be latched when
                  using a microprocessor with a multiplexed address/data  bus.
                     The access time of  the EPROM is a critical factor and is often overlooked in
                  embedded designs. EPROM access times are specified as a maximum. For example,
                  an EPROM with a specified maximum access time of 12011s requires no more than
                  120ns from the time the address is stable and chip select is low to generate a valid
                  output.  Most of  these EPROMs will be faster than the maximum time specified,
                  which gets a lot of designers into trouble. If you do not take into account the worst-
                  case numbers, the design will work until the purchasing department buys a batch
                  of EPROMs that happen to be a little slower than the ones you used in engineer-
                  ing debug. Worse yet, the problem may show up only when the temperature is above
                  90°F or when a certain brand of microprocessor is used.


                  Calculating EPROM Access  Time
                  To  calculate  the  required  EPROM  access  time, you  must  start  with  the  micro-
                  processor data sheets. The procedure is as follows:

                     Calculate the time from when the microprocessor provides a stable address
                     until it requires stable data.


                  42                                              Ernbedded Micropfoocesso7 Systnns
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