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                                                                                                                                  To
                                                                                              DMA CONTROLLER WRITES   BLOCK OF   INTERRUPT  cpu
                      m                                                                       DATATO SUCCESSIVE
                      4
                                                                                              LOCATIONS IN MEMORY
                            INCOMING SERIAL DATA                                      ............

                                                                                      CONTROLLER
                                                                                                DMA CONTROLLER READS
                                                                                                DATA FROM SUCCESSIM       RY
                                                                                      ............
                            OUTGOING SERIAL DATA













                                DMA TRANSFER FROM UART  DMA REQUEST
                                                  FROM UART    I
                                                       HOLD



                                                       Bus   cpu   DMA CONTROLLER   DMA CONTROLLER   cW
                                                                  (READING MEMORY)   (WRITING UART)
                     3          OMA TRANSFER TO UART
                      B

                     %                                 HLDA


                            Figure 2.24
                            DMA Transfer Example.
   90   91   92   93   94   95   96   97   98   99   100