Page 150 - Engineering Digital Design
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PROBLEMS                                                             121



                  [2] W. I. Fletcher, An Engineering Approach to Digital Design. Prentice Hall, Englewood Cliffs,
                     NJ, 1980.
                  [3] A. W. Shaw, Logic Circuit Design. Sanders College Publishing, Fort Worth, TX, 1993.
                  [4] R. F. Tinder, Digital Engineering Design: A Modern Approach. Prentice Hall, Englewood Cliffs,
                     NJ, 1991.

                   Virtually every text on digital or logic design provides some coverage of Boolean al-
                 gebra. The texts of McCluskey and Dietmeyer are noteworthy for their coverage of both
                 conventional Boolean algebra and XOR algebra including a very limited treatment of the
                 Reed-Muller expansion theorem.

                  [5] D. L. Dietmeyer, Logic Design of Digital Systems, 2nd ed. Allyn and Bacon, Boston, MA, 1978.
                  [6] E. J. McCluskey, Logic Design Principles. Prentice-Hall, Englewood Cliffs, NJ, 1986.

                   A more formal treatment of XOR algebra can be found in the work of Fisher.

                  [7] L. T. Fisher, "Unateness Properties of AND-EXCLUSIVE OR," IEEE Trans, on Computers
                     C-23, 166-172 (1974).

                   A brief history of Boolean algebra is provided in Chapter 2 of Hill and Peterson.

                  [8] F. J. Hill and G. R. Peterson, Digital Logic and Microprocessors, John Wiley, NY, 1984.

                   CMOS logic, which is emphasized in this text, is adequately covered by Weste and
                 Eshraghian in Chapter 1 and portions of Chapter 5. But an excellent coverage of experimen-
                 tal work on various XOR and EQV gates on the MOS transistor level is given by Wang et al.

                  [9] N. H. E. Weste and K. Eshraghian, Principles of CMOS VLSI Design, Addison-Wesley, Reading,
                     MA, 1985.
                 [10] J. Wang, S. Fang, and W. Feng, "New Efficient Designs for EXOR and XNOR Functions on the
                     Transistor Level," IEEE Journal of Solid-State Circuits 29(7), 780-786 (1994).



                 PROBLEMS

                 3.1 Define the following:
                     (a) Mixed logic
                     (b) Polarized mnemonic
                     (c) Logic level conversion
                     (d) Active and inactive states
                     (e) Inverter
                      (f) Gate
                 3.2 Identify the gate appropriate to each of the physical truth tables in Fig. P3.1. Note: It
                     may be necessary to search this chapter for the answers.
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