Page 340 - Engineering Digital Design

7.5 ROMs, PLAs, AND PAL DEVICES 311

The mixed-logic output rules for ROMs, PLAs, and PALs differ somewhat depending
on the PLD in question. The mixed-logic output rules for ROMs are as follows:

For Mixed-Logic Outputs from ROMs
(1) In the ROM program table complement each bit in the column of any output from
a ROM that is required to be active low,
or
(2) Use the inverter capability of the ROM, or add one externally, on that output line to
generate the active low output and do not complement the bits in the output column.

Since ROMs accept only canonical (minterm) data, it is permissible, as an option, to
complement the output column for an active low output. This is equivalent to complementing
the conventional (1's and O's) K-map for the active low output to yield
YSOP(L) = Y SOp(H\ (7.2)

which follows from the definition of complementation given by Eq. (3.2). But this is only
possible for canonical data as in the case of a ROM. For example, suppose it is required
that the output (A = B) in Fig. 7.4 be generated active low. To do this, the (A = B) output
column can be complemented, interchanging the (o) and (•) symbols, or an inverter can be
connected to the (A = B) output line from the PROM.
The situation for PLA and PAL devices is much different from that for ROMs relative
to active low outputs. Now, reduced or minimum forms constitute the output functions,
and complementation of the output columns of active low outputs would result in radically
different functions. Equation (7.2) does not apply to output column complementation for
these PLDs. The rule for dealing with active low outputs from PLA and PAL devices is
stated in the following way:

For Active Low Outputs from PLA and PAL Devices
If a given output line from a PLA or PAL device must be generated with an activation
level different from that provided internally by the PLD, use must be made of an
inverter added externally to that line. Complementation of an output column in the
p-term table is not permitted.

As an example, consider the FPLA in Fig. 7.10, which has been programmed to function
as a 4-bit shifter with F fill. Suppose that R arrives active low and that all outputs must
be delivered to the next stage active low. To achieve this objective with minimum exter-
nal logic, the R column is complemented and, if mixed logic outputs are not provided
internal to the FPLA, inverters are placed on the output lines for Y^,Y2,Y\, and YQ. Com-
plementation of the R column in the p-term table of Fig. 7.9 requires that the 1's and O's
be interchanged but leaving all dashes unaltered. Thus, the x 's in the two R columns in
Fig. 7.10 will be moved from the active high column to the active low column and vice
versa. The meaning of the x's was explained previously in discussing the symbolism of
Fig. 7.10.