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388 CHAPTER 8/ARITHMETIC DEVICES AND ARITHMETIC LOGIC UNITS (ALUs)

subtrahend. Note that a 1 carry cannot be generated in XS3 subtraction. (Hint: An
additional four controlled inverters are needed for the add/subtract operations.)
(b) Test the design of a two-digit XS3 adder/subtractor by introducing the following
numbers and mode control:

Test #1 A = 610, B = 29io, and A/S(H) =
Test #2 A = 610, B = 29 10, and A/S(H) = \(H)

To do this indicate the logic values for each operand, sum, carry, mode control, and
correction parameter. Note that the decimal value of a negative XS3 number is found
by subtracting . . .001 1 from the negated number and reading it as a BCD number.
8.15 In Fig. P8.3a is shown a network containing several combinational logic devices
including a 4-bit ripple/carry adder.
(a) Complete the truth table in Fig. P8.3b.
(b) Use a decoder and a single OR gate to accomplish the result given in part (a).
Assume that the decoder has active high outputs.

8.16 (a) Design a 4-bit noncascadable comparator by using two 4-bit subtracters and one
NOR gate (nothing else). [Hint: It will be necessary to switch operands on one
of the two subtracters. Also, in a subtracter, a final borrow-out of 1 indicates
(minuend) < (subtrahend), but a final borrow-out of 0 indicates (minuend) >
(subtrahend). Thus, if both borrow-outs are logic 0, then the two numbers are
equal. Note that a negative difference is given in 2's complement but taking into
account B in) LSB = 0.]
(b) Test the design in part (a) by using the following operands:
Test#l A = 1101; B =0110
Test #2 A = 01 10; B = 1101
Test #3 A = 1010; B = 1010
(c) Show that the difference of the two operands can also be read from the circuit.

8.17 (a) By using Eqs. (8.8), complete the carry look-ahead adder (CLA) circuit in Fig. 8.13
for a cascadable 4-bit CLA adder unit. Thus, include the carry generate/propagate
logic from the fourth stage.
(b) Test the results by adding the following numbers:
Test #1 A = 01 11; 5=0110
Test #2 A = 1101; B = 1010

8.18 Analyze the carry-save circuit of Fig. 8.15b by introducing the three operands given
in Fig. 8.15a into the circuit. To do this, give the logic values for each operand, sum,
and carry.
8.19 Analyze the 4x4 binary multiplier in Fig. 8. 1 8 by introducing the following operands
into the circuit:
(a)A = 1101; 5 = 0110
(b)A = 1001; B = 1011