Page 249 - Hardware Implementation of Finite-Field Arithmetic

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Operations over GF (2 )—Polynomial Bases 229

7.7.11 Montgomery Exponentiation
The circuits were generated for specific polynomials. The circuits are
sequential implementations (see Table 7.14).

m FFs LUTs Slices Period Total time (μs)
8 93 112 68 3,8 0,38
163 1,359 1,260 752 5,4 147
233 1,926 1,773 1,050 5,9 326

TABLE 7.14 Cost and Delay of Montgomery Exponentiation

7.7.12 Division
The circuits were generated for specific polynomials. The circuits
are sequential implementations and use 2m cycles in worst case (see
Table 7.15).

m FFs LUTs Slices Period Cycles Total time
8 43 64 42 4.5 16 72
16 77 96 68 5.0 32 160
32 146 170 124 6.2 64 397
64 275 300 223 7.2 128 922
128 537 571 430 7.2 256 1843
163 679 726 544 7.4 326 2412
233 962 1,013 763 7.4 466 3448

TABLE 7.15 Cost and Delay of Binary Polynomial Divisor
7.7.13 Extended Euclidean Algorithm (EEA) for Inversion
The circuits were generated for specific polynomials. The circuits are
sequential implementations and use 2m cycles (see Table 7.16).

m FFs LUTs Slices Period Cycles Total time
8 49 110 58 4.2 16 67
16 82 239 127 4.8 32 154
32 147 441 235 5.4 64 346
64 291 879 460 5.6 128 717
128 581 1,612 923 5.8 256 1,485
163 693 1,927 984 6.7 326 2,184
233 980 2,742 1,401 7.5 466 3,495

TABLE 7.16 Cost and Delay of EEA for Inversion