Page 355 - Introduction to Microcontrollers Architecture, Programming, and Interfacing of The Motorola 68HC12
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332                                               Chapter 1! Input/ Output


         unsigned char i;
         void main() {
            TSCR = 0x80; TTMSKl = TFLG1 = TCTLE = 1; asm CLI
            do ; while(l);
         }
         void interrupt 8 hndlr(void){ TFLG1=1; /*clrreqst*/ i++; /* inc count */}

         An optimized assembly-language program segment for the body of the C procedure is

         i:     DS. B    1           ; Global storage for 8-bit count i
                LDAB     #$80        ; Put one in leftmost bit of accumulator B
                STAB     $86         ; Write it into control register TSCR
                LDAA     #$ 1        ; Generate one in Accumulator A
                STAA     $ 8E        ; Write one in rightmost bit of control reg. TFLG1
                STAA     $ 8C        ; Write one in rightmost bit of control reg. TMSK1
                STAA     $8B         ; Write 1 in rightmost bit of control reg. TCTLE
                CLI                  ; Enable interrupt
         LOOP: BRA       LOOP        ; loop forever

         An optimized assembly-language program segment for the handler is

         HNDLR: MOVE #1, TFLG1      ; Write one in rightmost bit of control register TFLG1
                 INC i              ; Increment count
                 RTI                ; Return to interrupted routine

        The main procedure above initializes the control registers and loops forever. The I
        condition code bit is generally clear after the 6812 is reset and must be cleared to enable
        interrupts to occur. A high-level language like C generally does not have a way to enable
         interrupts, except by inserting embedded assembly language. The statement asm CLI
         inserts CLI into the assembly-language program. Each time another vector element is to
        be output, a switch is closed, and PORTT bit 0 sees a rising edge. This causes an
        interrupt, and the handler is entered. This handler increments the count.
            We further illustrate an interrupt-based traffic light controller that is essentially the
         same as the gadfly-based traffic light controller example. The main procedure initializes
        the control registers, waits for all elements to be output, and then disables the interrupt.
        Each time another vector element is to be output, a switch is closed, and PORTT bit 0
         sees a falling edge. See Figure 11.9. This causes an interrupt, and the handler is entered.
        This handler outputs an element from the vector. To output the vector, execute

         char buffer[0x80], i = 0x80;
         void main{) {
            DDRA = OxFF;  TSCR = 0x80; TFLG1 = TMSK1 = 1; TCTLE = 2; asm CLI
            do ; while ( i ); /* wait until all are output */ TMSK1 = 0; /* disable interrupt */
         }
         void interrupt 8 hndlr (void) (TFLGl=l;PORTA=buff erf—i ];/* output data */}
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