Page 105 - System on Package_ Miniaturization of the Entire System

CHAPTER 3

Stacked ICs

and Packages (SIP)

Baik-Woo Lee, Tapobrata Bandyopadhyay, Chong K. Yoon,
Prof. Rao R. Tummala
Georgia Institute of Technology

Kenneth M Brown
Intel

3.1 SIP Definition 82 3.4 TSV SIP 121
3.2 SIP Challenges 85 3.5 Future Trends 143
3.3 Non-TSV SIP 93 References 144

he ever-increasing demands for miniaturization and higher functionality at
lower cost processes have driven the development of stacked ICs and packages
T(SIP) technologies. The SIP is a single miniaturized functional module realized
by the vertical stacking of two or more similar or dissimilar bare or packaged chips.
Bringing the chips closer together enables the highest level of silicon integration and
area efficiency at the lowest cost, compared to mounting them separately in traditional
ways. In doing so, the electrical path length between chips is reduced, leading to
higher performance. In addition, this technology allows the integration of hetero-
geneous IC technologies like analog, digital, RF, and memory into one package,
resulting in the integration of more functionality in a given volume. Because of these
attributes, SIP technology is emerging as a strong contender in a variety of applications
that include cell phones, digital cameras, PDAs, audio players, laptops, and mobile
games to be delivered in an innovative form factor with superior functionality and
performance.

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