Page 106 - System on Package_ Miniaturization of the Entire System

82 Cha pte r T h ree

SIP is being accomplished currently at the bare chip, package, or wafer level by employing
either traditional interconnection technologies including wire bonding or flip chip (referred
as non-TSV SIP) or advanced assembly technologies such as through-silicon-via (TSV) and
wafer-to-wafer bonding (referred to as TSV SIP). This chapter provides a broad overview of
a variety of SIP architectures being pursued in the industry. It reviews the SIP challenges up
front regarding electrical, materials, processes, mechanical, and thermal issues. It then follows
up with a review of the status of each of these in two main areas—SIP by non-through-silicon
vias and SIP by through-silicon vias.

3.1 SIP Definition

3.1.1 Definition
The SIP is often referred to and defined as “system-in-package,” implying that it is a complete
system in a package or module. It is also described often as a multichip module (MCM). But
the MCM has been a huge, multibillion dollar market going back to the 1980s and 1990s
when IBM, Hitachi, Fujitsu, and NEC poured billions of dollars into developing the 2D MCM
technology with as many as 144 ICs on a single substrate to meet the ultrahigh computing
needs. This technology is still used and is expected to continue to be used since the 3D
technology, described in this chapter, will not solve the thermal problems at 150 to 200 W per
chip in a multichip processor system. On the other hand, for any package to be a system, it
must fulfill all system functions of a system board. These include not only actives and
passives but also multilayer wiring, thermal structures, system I/Os or sockets, and power
supplies. But this has not been demonstrated with SIP to date. Most SIP technologies often
describe stacking of either the bare chips or packaged chips in three dimensions. This chapter
views SIP in this latter context. SIP is defined, therefore, as a 3D module with two or more
similar or dissimilar stacked chips. The SIP can be divided into two major categories: (1)
interconnection of stacked chips as achieved by traditional chip assembly technologies such
as wire bonding, tape automated bonding (TAB), or flip chip and (2) interconnection of
stacked chips as achieved by more advanced chip assembly technologies such as through-
silicon-via (TSV) and direct bonding of one chip to the other without the traditional wire
bonding or flip chip technology. The former stacking is referred to in this chapter as non-TSV
and the latter as TSV. The non-TSV technologies can be further classified into chip stacking
and package stacking, as described later in this chapter. The TSV technologies, as described
in this chapter, can be used to bond not only bare ICs but also wafers and Si chip carriers,
thereby ending up with more functional subsystems or complete systems.

3.1.2 Applications
Since SIP includes both similar ICs such as dynamic random access memory (DRAM)
and dissimilar ICs such as logic and memory, the applications for SIP are as broad as ICs
themselves. These applications, therefore, include high-volume manufacturing for
mobile consumer products such as multifunction handsets, MP3 players, video-audio
gadgets, portable game consoles, and digital cameras, to name a few.

3.1.3 CEO Figure and SIP Categories
Figure 3.1 shows a summary of how SIP technology has evolved during the last 40 years. SIP
technology is divided into two major categories: non-TSV and TSV technologies, as defined
earlier. As shown in Figure 3.1, the concept of SIP or 3D integration of ICs was first