Page 385 - Sami Franssila Introduction to Microfabrication
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364 Introduction to Microfabrication



            vacuum tube but that it can do things that the vacuum  every year. In 1965, Gordon Moore spoke about this
            tube could never do!” (from reference Ross).  pattern. The observation was based on few data points,
              Many MEMS and nanodevices today are minia-  but the conclusion became famous. Later, the prediction
            turized versions of existing devices. Sometimes, a  was revised to doubling every 18 months, and this
            smaller size is useful because it results in, for example,  version has been especially long lasting. It has been
            smaller power consumption or higher speed. However,  dubbed Moore’s law, even though it is only an empirical
            it is equally important to look for new applications  pattern without fundamental justification (Table 38.1).
            in which new physical phenomena, new combina-  Moore’s 1965 prediction extended till 1975 and
            tions of speed and power can be utilized, or where  his extrapolation was quite accurate. The trend has
            macroscopic counterparts do not exist, or where the  continued approximately at the predicted speed, give or
            scale economies of microfabrication have not yet  take some fluctuations. At the turn of the millennium,
            been utilized.                               the pace has been even faster than that predicted by
              The whole can be more than the sum of its parts. The  Moore’s law. DRAM memory chips are best suited for
            very concept of integration seems to have escaped the  Moore’s law studies because the law is about production
            attention of the supporters of argument number four.  economics: chip size and cost minimization. Processors
            Integrated circuits paved the way for more powerful  are governed by quite different laws: they are design-
            electronic systems. And the savings in assembly costs  heavy, rather than manufacturing-driven, and proprietary
            quickly more than compensated the higher cost of ICs.  architectures are not subject to ultimate cost reductions.
              Argument five was mathematically valid, but it was  One gigabit DRAM circuits were unveiled with 0.18 µm
            based on the technology of its day, and it did not  geometries as predicted, and 4 Gbit DRAM memory
            anticipate the tremendous strides in microfabrication  circuits with 0.10 µm dimensions are being made in
            technologies. The success of ICs has been dependent on  2003. It should be borne in mind that sometimes the
            the fact that in spite of continuous miniaturization and  product demonstration date is used (when the first
            complexity of the manufacturing process, the yield of  fully functional chips are fabricated), sometimes the
            individual transistors on ICs has improved dramatically.  production start date is used and sometimes the peak
            In 1960, the yield of 50% for individual devices  production year is stated.
            resulted in a 3% yield for a five-transistor IC (today,  Shrink versions make the situation more complex: the
            integrated microfluidic systems face a similar situation:  first functional 1 Gbit DRAMs were demonstrated using
            while pumps, valves and mixers may have reasonable  0.18 µm technology, but production versions have been
            yields, systems consisting of many such devices have  made at smaller linewidths: 0.13 to 0.10 µm. Add to
            rather low yields). In the year 2000, 64 Mbit DRAMs  this the minor differences between companies, and it is
            with some 130 million transistors and capacitors were
                                                         fair to accept discrepancies of a few years in Moore’s
            manufactured with ca. 90% yields, which translates to
                                                         law data.
            practically a 100% yield for individual devices, for
                                                           Moore’s law was originally proposed in the era of
            0.25 µm devices, compared to the ca. 25 µm devices of
                                                         bipolar transistors and it has held well in the era of
            1960.                                        PMOS, NMOS and CMOS, and it seems to hold for
              The early proponents of the IC had to balance  the next decade of strained silicon and SOI-CMOS and
            between two options:
                                                         other evolutionary MOS technologies. Moore’s law is
                                                         about device-packing density and cost, and not about
            1. Suitable only for price-insensitive applications like  any particular technology. There have been a number
               military or space technology.             of dubious extensions of Moore’s law: it has been
            2. Will be cheap in the future once technology matures.  said to apply to computing power, which is not true
                                                         because computer architecture is not part of Moore’s
              Early growth was, of course, along the first argument  law. Despite its non-fundamental nature, it is one of the
            because somebody had to pay for the chips but at the end  few predictions about future technology that has held
            of the 1960s the second argument was finally realized,  for 40 years.
            and the IC became a household term.            Linewidth scaling has been very predictable. Junction
                                                         depths were scaled with linewidths as L/5 for decades,
            38.2 MOORE’S LAW                             but more recently it has been difficult to scale x j down
                                                         as aggressively as linewidth. Gate oxide thickness used
            The development of ICs seemed to follow a regular  to scale as L/45 for a long time, but with oxide thickness
            pattern: doubling the number of devices on the chip  now approaching one nanometre EOT, it is not possible
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