Page 101 - Mechatronic Systems Modelling and Simulation with HDLs

90 5 SOFTWARE IN HARDWARE DESCRIPTION LANGUAGES

order to subsequently bring about synchronisation, it must be possible to leave the
routines at any desired points and re-enter them again later; they must therefore
be ‘re-entrant’.
Furthermore, it is necessary that they have a memory so that the applicable
system state can be held in the form of a context. Such a context thus includes the
registers of the underlying processor and the complete main memory. Furthermore,
a second context is saved in parallel so that the synchronisation — as described
more precisely later — can refer back to an old state.
The basic idea is now to store short blocks of C instructions, which each rep-
resent an assembler instruction, one after the other in a routine. The sequence of
C blocks thus corresponds with the sequence of assembler instructions, so that
sequential progress through the assembler instructions corresponds with sequential
progress through the C blocks.
A C block for an assembler instruction in principle contains the following
components:

• Execution of the operation, e.g. for arithmetic and logical operations.

• Setting of the flags, depending upon operation.
• Setting the programme counter, normally by an increment based upon the byte
number of the operation, or in the event of jumps an addition (relative) or an
assignment (absolute).
• Protecting the return address on the stack in the event of subprogramme calls.

• Addition of the number of required cycles on the cycle counter.
• Calculation of the current time from the cycle counter.

• Control of the debugger.
• Details of the representation will be described in Section 5.4.4 on the basis of
an example.

5.4.3 Synchronisation

Introduction

The synchronisation between hardware and software serves to effect the correct
chronological sequence of events in the software model and hardware model in
the simulator. A significant prerequisite for a simple and efficient solution is that
the simulation of the hardware runs in a linear manner and at most is delayed only
now and then. All other strategies would have an effect deep within the logic or
circuit simulator used, thus shifting the problem from the modelling level to the
tool level, which would often rule out solutions based upon commercial simulators.
In order to achieve this the software should run for a defined time span. This is
effected by calling up an external C routine from the hardware model. With regard