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72 4 MODELLING IN HARDWARE DESCRIPTION LANGUAGES
by an amount that depends upon its parameter. This may be based, for example,
upon a fixed time period or the occurrence of a certain event. The process is
executed accordingly by the performance of a sequence of instructions between
two synchronisation points. Sequential instructions in VHDL are comparable to
the instructions of procedural programming languages. In the following, a few
processes will be described as examples.
Example: multiplexer
The first example is a multiplexer that is formulated in Hardware description 4.5
as ENTITY and ARCHITECTURE. Synchronisation takes place by means of the WAIT
instruction, which interrupts the execution of the process until at least one of the
signals a, b or sel has changed. Thus the body of the architecture proceeds as
soon as there is a change at the inputs of the multiplexer. Then and only then can
a change at the outputs be expected.
LIBRARY IEEE;
USE IEEE.std_logic_1164.all; -- IEEE package for logic types
ENTITY mux IS -- Interface description of multiplexer ...
PORT(a, b, sel: IN std_logic;
q : OUT std_logic);
END mux;
ARCHITECTURE behaviour OF mux IS -- Architecture description...
BEGIN
PROCESS -- Process ...
BEGIN
WAIT ON sel, a, b; -- Wait for signal changes
if sel = ‘1’ then -- Case differentiation
q <= a; -- Signal allocation
else
q <= b; -- Signal allocation
END IF;
END PROCESS;
END behaviour;
Hardware description 4.5 Behaviour-oriented modelling of a multiplexer
Example: multiplier
The next example is used to explain in more detail the various abstractions of
modelling in a design sequence. The example relates to a multiplier. In its simplest
form this can be described by a times sign, see Hardware description 4.6. This
form of description is extremely compact, although a realisation of the circuit
can consist of thousands of gates. In a second description, multiplication can be
traced back to shifting and adding, as we learned multiplication at school, see