Page 392 - A Practical Guide from Design Planning to Manufacturing

362 Glossary

Compaction An integrated circuit design project that moves an earlier design
onto a new manufacturing process while making few other changes.
Compiler A program that converts a high-level programming language into
machine language.
Complementary metal oxide semiconductor (CMOS) A manufacturing
process or logic gate that uses both NMOS and PMOS transistors.

Complex instruction set computing (CISC) Computer architectures that sup-
port memory operands in computation instructions, variable instruction size, and
many addressing modes. Examples are the VAX and x86 architectures. See RISC.
Computer architecture The set of instructions that can be executed by a
processor, their encodings, and their behavior. Computer architecture defines
all the information needed to create machine language programs for a processor.
Conduction band The band of energy states available to electrons not bound
to a particular atom in a crystal.
Conductor A material containing a large number of free charge carriers allow-
ing it to conduct electricity easily.
Conflict miss A cache miss that would not have occurred in a cache of higher
associativity.
Contact A vertical connection between the lowest level of interconnect and the
semiconductor surface.
Control dependency The dependency caused when one instruction alters the
program execution flow. If path of execution cannot be determined until an
instruction is executed, following instructions must stall unless branch predic-
tion is used to guess the proper instructions to execute.
Controlled collapse chip connection (C4) bumps Solder bumps used by die
to be assembled in flip-chip packages. The C4 bumps are collapsed under heat
and/or pressure to form electrical connections.
Cross talk Electrical noise on a wire caused by changing voltages on neigh-
boring wires.
CSP Chip scale package.
CTE Coefficient of thermal expansion.
CUF Capillary underfill.
Cutoff region The MOSFET region of operation where gate voltage does not
form an inversion layer at either end of the channel and there is almost no cur-
rent flow. See linear and saturation regions.
CVD Chemical vapor deposition.
Czochralski (CZ) crystal growth A method for growing large crystals by grad-
ually pulling a spinning seed crystal out of a crucible of molten material. This
method is used to create silicon ingots, which are sliced into wafers for processing
into integrated circuits.