Page 397 - A Practical Guide from Design Planning to Manufacturing

Glossary 367

Hardware description language (HDL) A computer programming language
specifically intended to simulate computer hardware.
HDI High-density interconnect.
HDL Hardware description language.
Heat sink A metal structure attached to an integrated circuit package to
improve heat dissipation. Passive heat sinks work by simply providing increased
surface area. Active heat sinks include a built-in fan.
High-density interconnect (HDI) Package interconnects created using thin-film
process technologies.
High-K gate dielectric A layer of high permittivity (high-K) material created
under the gate of a MOSFET. Using high-K materials gives the gate more con-
trol over the channel without needing to further thin the gate oxide layer.
High-level programming language A programming language that is inde-
pendent of a particular computer architecture. Examples are C, Perl, and
HTML.
Hold noise Noise on a sequential node created by inputs switching just after
the sequential has captured a new value.
HyperThreading An x86 architectural extension that allows software to treat
a single processor as if it were two processors executing separate program
threads. This improves performance by allowing one thread of execution to
make forward progress while another thread is stalled.

IC Integrated circuit.
ICH Input/output controller hub.
IHS Integrated heat spreader.
ILD Interlevel dielectric.
ILP Instruction level parallelism.
Infrared emissions microscope (IREM) A microscope that takes pictures of
infrared light. Silicon is transparent to infrared and transistors will emit at this
frequency when drawing current, allowing images to be taken showing where
power is being consumed on the die.
Input output controller hub (ICH) A chipset component controlling communi-
cation the between the Northbridge of the chipset and all the lower bandwidth
buses. Also called the Southbridge.
Instruction level parallelism (ILP) The ability of individual machine language
instructions from a single computer program to be executed in parallel. The
amount of ILP determines the maximum instructions per cycle possible for a par-
ticular program.
Instruction pointer (IP) A register containing the address of the next instruc-
tion to be executed.