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PDA 05  5/30/03  11:35 AM  Page 90
                                                     PDA Robotics
                          This  interrupt-on-mismatch  feature,  together  with  software  config-
                          urable pull-ups on these four pins, allows easy interface to a keypad
                          and make it possible for wake-up on key depression.
                          PORTC and the TRISC Register
                          PORTC  is  an  8-bit-wide,  bidirectional  port.  The  corresponding  data
                          direction register is TRISC. Setting a TRISC bit (= 1) will make the cor-
                          responding PORTC pin an input (i.e., put the corresponding output
                          driver in a Hi-Impedance mode). Clearing a TRISC bit (  0) will make
                          the corresponding PORTC pin an output (i.e., put the contents of the
                          output latch on the selected pin).

                          PORTC is multiplexed with several peripheral functions. PORTC pins
                          have Schmitt Trigger input buffers. When the I2C module is enabled,
                          the  PORTC<4:3>  pins  can  be  configured  with  normal  I2C  levels,  or
                          with SMBus levels by using the CKE bit (SSPSTAT<6>). When enabling
                          peripheral  functions,  care  should  be  taken  in  defining  TRIS  bits  for
                          each PORTC pin. Some peripherals override the TRIS bit to make a pin
                          an output, while other peripherals override the TRIS bit to make a pin
                          an input. Since the TRIS bit override is in effect while the peripheral is
                          enabled,  read  modify  write  instructions  (BSF,  BCF,  XORWF)  with
                          TRISC as destination, should be avoided. The user should refer to the
                          corresponding peripheral section for the correct TRIS bit settings.

                          Analog-to-Digital  Converter  (A/D)  Module.  The  Analog-to-Digital
                          (A/D)  Converter  module  has  five  inputs  for  the  28-pin  devices  and
                          eight  for  the  other  devices.  The  analog  input  charges  a  sample  and
                          hold  capacitor.  The  output  of  the  sample  and  hold  capacitor  is  the
                          input into the converter. The converter then generates a digital result
                          of this analog level via successive approximation. The A/D conversion
                          of  the  analog  input  signal  results  in  a  corresponding  10-bit  digital
                          number. The A/D module has high- and low-voltage reference input
                          that is software selectable to some combination of VDD, VSS, RA2, or
                          RA3. The A/D converter has a unique feature of being able to operate
                          while  the  device  is  in  SLEEP  mode.  To  operate  in  SLEEP,  the  A/D
                          clock must be derived from the A/D’s internal RC oscillator.
                          The A/D module has four registers. These registers are:
                          •    A/D Result High Register (ADRESH)



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