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PDA 05 5/30/03 11:35 AM Page 87
pins are read, the value is modified, and then written to the port data
latch. Chapter 5 / The Electronics
Pin RA4 is multiplexed with the Timer0 module clock input to
become the RA4/T0CKI pin. The RA4/T0CKI pin is a Schmitt Trigger
input and an open drain output. All other PORTA pins have TTL input
levels and full CMOS output drivers. Other PORTA pins are multi-
plexed with analog inputs and analog VREF input. The operation of
each pin is selected by clearing/setting the control bits in the ADCON1
register (A/D Control Register1). Note: I/O pin has protection diodes to
VSS only.
The TRISA register controls the direction of the RA pins, even when
they are being used as analog inputs. The user must ensure the bits in
the TRISA register are maintained set when using them as analog
inputs.

Chapter 7: Programming the PIC16F876 Microcontroller explains how
to set the TRIS registers using a C code macro.

PORTB and the TRISB Register

PORTB is an 8-bit-wide, bidirectional port. The corresponding data
direction register is TRISB. Setting a TRISB bit (= 1) will make the cor-
responding PORTB pin an input (i.e., put the corresponding output
driver in a Hi-Impedance mode). Clearing a TRISB bit (= 0) will make
the corresponding PORTB pin an output (i.e., put the contents of the
output latch on the selected pin).

Three pins of PORTB are multiplexed with the Low Voltage
Programming function: RB3/PGM, RB6/PGC, and RB7/PGD.

Each of the PORTB pins has a weak internal pull-up. A single control
bit can turn on all the pull-ups. This is performed by clearing bit
RBPU (OPTION_REG<7>). The weak pull-up is automatically turned
off when the port pin is configured as an output. The pull-ups are dis-
abled on a Power-on Reset.

Four of the PORTB pins, RB7:RB4, have an interrupt on-change fea-
ture. Only pins configured as inputs can cause this interrupt to occur
(i.e., any RB7:RB4 pin configured as an output is excluded from the
interrupton-change comparison). The input pins (of RB7:RB4) are
compared with the old value latched on the last read of PORTB. The

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