Page 286 - Semiconductor Manufacturing Handbook
P. 286

Geng(SMH)_CH19.qxd  04/04/2005  20:00  Page 19.13




                                                INSPECTION, MEASUREMENT, AND TEST

                                                                        INSPECTION, MEASUREMENT, AND TEST  19.13

                                    Guardbanding is a process shown in Fig. 19.6, which adjusts the test limits to take the setup and
                                                                                                     *
                                  measurement uncertainty into account. The SEMI organization has quantified this in the E35 docu-
                                  ment. The goal is to eliminate the possibility of falsely passing a bad part, but it also has the unde-
                                  sirable effect of potentially failing a good part. High accuracy and low uncertainty are desirable so
                                  that the guardband can be reduced as much as possible thereby maximizing yield.
                                  Defining the Project. Developing a test program can be a complicated process and must be treated
                                  as a project. Formal project management rules should be used including developing a project defin-
                                  ition with a timeline.
                                  1. Defining the application development phases:
                                    a. The proposal phase defines the deliverables such as the hardware delivered, the test parameter list,
                                      software coding and debugging, production integration (wafer prober or IC handler integration,
                                      special operator interface, or data log needs), solution diagnostics, and project wrap up definition
                                      (items 2 to 6 in this section). The proposal phase requires an agreement from the IC design group.
                                    b. The design phase defines the test strategy and the design of the DUT board hardware.
                                    c. The implementation phase executes the design phase plans.
                                    d. The release phase is when the project is completed and released.
                                  2. Acceptance criteria. The acceptance criteria defines how the list of deliverables will be demon-
                                    strated to be complete and within the specifications of the agreement. The mean, sigma, and corre-
                                    lation limits of the data need to be defined as well as the conditions under which they are taken.
                                  3. Documentation of the project deliverables. A written explanation of the test including schemat-
                                    ics of the circuit used on the DUT board for each test including test data, limits, and the statisti-
                                    cal variations. This documentation will be used for future modifications and maintenance, and for
                                    new engineers to learn the test solution.
                                  4. Training for the deliverables of the project. The training on how to run the program and cor-
                                    rectly set up the hardware. The training could vary depending on the job function of the person
                                    operating the program.
                                  5. Roles and responsibilities of the different parties. A roles and responsibilities definition makes
                                    it clear who is responsible for which deliverables and what specific knowledge is required.
                                  6. Change management definition to this proposal. Since changes will inevitably happen, it is
                                    important to define up front how these changes will be handled.
                                  Each of the project deliverables should be put on a timeline with dependencies to the previous items
                                  noted.
                                    This plan incorporates the common elements of developing a test program—defining the DUT
                                  pins, configuring what test system resources are needed based on the DUT functionality, designing
                                  a DUT interface from the DUT to the tester resources, transferring and translating any EDA data that
                                  are applicable, writing and debugging the test program, data logging the results, further analyzing
                                  the data to look at the mean, sigma, and correlation to known good devices, developing a binning
                                  strategy, developing a diagnostic for the test solution, and documenting the project including train-
                                  ing on the use of the solution.
                                  Common Test Parameters.  Usually test parameters are as diverse as the end applications for which
                                  parts are designed. However there are some types of test parameters that are common to all devices.
                                    Continuity: Device pins are ESD-protected by a diode to ground and/or power. A current sink (−)
                                    is placed on the DUT pin while the ground or V substrate is grounded. The resulting current
                                                                        cc
                                    turns the diode on and a diode drop voltage is measured on the DUT pin. A short circuit would
                                    read as 0 V and an open would go above the preprogrammed voltage clamp value placed on the
                                    DUT pin current force function.

                                    * SEMI E35-0701, Cost of Ownership.


                             Downloaded from Digital Engineering Library @ McGraw-Hill (www.digitalengineeringlibrary.com)
                                        Copyright © 2004 The McGraw-Hill Companies. All rights reserved.
                                          Any use is subject to the Terms of Use as given at the website.
   281   282   283   284   285   286   287   288   289   290   291