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FUNDAMENTALS OF SILICIDE FORMATION ON Si
5.10 SEMICONDUCTOR FUNDAMENTALS AND BASIC MATERIALS
18. Pearson, W. B., A Handbook of Lattice Spacings and Structures of Metals and Alloys, Vol. 2, London:
Pergamon, 1967.
19. Tanner, L. E., and H. Okamoto, Z. Metallkd., Vol. 55, p. 503, 1964.
20. d’Heurle, F. M., C. S. Petersson, and M. Y. Tsai, “Observations on the hexagonal form of MoSi/sub 2/ and
WSi/sub 2/ films produced by ion implantation and on related snowplow effects,” J. Appl. Phys., Vol. 51,
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21. Kosolapva, T. Y., Handbook of High Temperature Compounds: Properties, Production, Applications, New
York: Hemisphere Publishing, 1990.
22. Massalski, T. B., Binary Alloy Phase Diagrams, 2d ed., Vol. 1–3, ASM, 1990.
23. Tu, K. N., W. K. Chu, and J. W. Mayer, “Structure and growth kinetics of Ni/sub 2/Si on silicon,” Thin Solid
Films, Vol. 25, p. 403, 1975.
24. Gosele, U., and K. N. Tu, “Growth kinetics of planar binary diffusion couples: ‘Thin-film case’ versus ‘bulk
cases’,” J. Appl. Phys., Vol. 53, p. 3252, 1982.
25. Pico C. A., and M. G. Lagally, “Kinetics of titanium silicide formation on single-crystal Si: Experiment and
modeling,” J. Appl. Phys., Vol. 64, p. 4957, 1988.
26. Lien, C. -D., M. -A. Nicolet, and S. S. Lau, “Kinetics of CoSi/sub 2/ from evaporated silicon,” Appl. Phys.
A, Vol. 34, p. 249, 1984.
27. Ren, L. P., B. Chen, and J. Woo, “Advanced silicide for sub-0.18 µm CMOS on ultra-thin (35 nm) SOI,”
IEEE International SOI Conference, pp. 88 and 89, 1999.
28. Liu, H. I., et al., “Thin silicide development for fully-depleted SOI CMOS technology,” IEEE Trans. Electron
Dev., Vol. 45, pp. 1099–1104, 1998.
29. Liang, J. M., et al., “Crystallization of amorphous CoSi/sub 2/thin films. I. Kinetics of nucleation and
growth,” Mater. Chem. Phys., Vol. 38, pp. 250–257, 1994.
30. Pan, G. Z., E. W. Chang, and Y. Rahmat-Samii, “Effect of a Ti-capped and Ti-mediated layer on Co silicide
formation,” Mat. Res. Soc. Symp. Proc., Vol., No. 716, pp. 451–456, 2002.
31. Kedzierski, J., et al., “Design analysis of thin-body silicide source/drain devices,” IEEE International SOI
Conference, pp. 21 and 22, 2001.
32. Kedzierski, J., et al., “Metal-gate FinFET and fully-depleted SOI devices using total gate silicidation,” IEDM
Tech. Dig., pp. 247–250, 2002.
33. Boothroyd, C. B., W. M. Stobbs, and K. N. Tu, “Formation of submicron epitaxial islands of Pd/sub 2/Si on
silicon,” Appl. Phys. Lett., Vol. 50, p. 577, 1987.
34. Poate, J. M., K. N. Tu, and J. W Mayer, Thin Films—Interdiffusion and Reactions, chap. 12, New York:
Wiley-Science, 1978.
35. Kamins, T. I., et al., “Chemical vapor deposition of Si nanowires nucleated by TiSi/sub 2/ islands on Si,”
Appl. Phys. Lett., Vol. 76, p. 562, 2000.
36. Tang, Q., et al., “Twinning in TiSi/sub 2/-island catalyzed Si nanowires grown by gas-source molecular-beam
epitaxy,” Appl. Phys. Lett., Vol. 81, p. 2451, 2002.
37. Kamins, T. I., X. Li, and R. S. Williams, “Thermal stability of Ti-catalyzed Si nanowires,” Appl. Phys. Lett.,
Vol. 82, p. 263, 2003.
38. Hess, D., P. Werner, R. Matttheis, and J. Heydenreich, “Interfacial reaction barriers during thin-film solid-state
reactions: the crystallographic origin of kinetic barriers at the NiS/sub 2//Si(111) interface,” Appl. Phys. A,
Vol. 57, pp. 415–425, 1993.
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