Page 307 - ARM 64 Bit Assembly Language

296 Chapter 9

Figure 9.3: Bits in the FPCR.

9.2 Register usage rules

As with the integer registers, there are rules for using the FP/NEON registers. These rules are
a convention, and following the convention ensures interoperability between code written by
different programmers and compilers.
• Registers v0 through v7 are volatile. They are used for passing floating point arguments
into a subroutine and/or storing local variables. Register v0 is also used for returning the
result of a function (if the result is a floating point number.
• Registers v8 through v15 are non-volatile, meaning that the contents of these registers
must be preserved across subroutine calls. If the subroutine uses these registers, their
contents must first be saved somewhere (usually on the stack) and restored before the sub-
routine returns.
• Registers v16 through v31 are also considered volatile, and can be used for local variables
and temporary variables.

In addition to the FPCR, all FP/NEON implementations contain at least two additional system
registers. The Floating-point System ID register (FPSID) is a read-only register whose value
indicates which FP/NEON implementation is being provided. The contents of the FPSID can
be transferred to an ARM integer register, then examined to determine which FP/NEON ver-
sion is available. There is also a Floating-point Exception register (FPEXC). Two bits of the
FPEXC register provide system-level status and control. The remaining bits of this register are
defined by the sub-architecture. These additional system registers should not be accessed by
user applications.

9.3 Floating point control and status registers

The Floating Point Control Register (FPCR) allows the programmer to control how floating
point operations are performed. The layout of the NEON FPCR is shown in Fig. 9.3.The
meaning of each field is as follows: