Page 310 - ARM 64 Bit Assembly Language

Floating point 299

9.4 Load/store instructions

The FP instruction set provides several instructions for moving data between memory and
the FP registers. There are instructions for loading and storing single and double precision
registers, and for moving multiple registers to or from memory. All of the load and store in-
structions require a memory address to be in one of the ARM integer registers. The available
memory addressing modes are identical to the integer load and store instructions.

9.4.1 Load/store single register

The single register load/store instructions allow moving data between memory and an FP/-
NEON register. These instructions can load/store a byte, half-word, word (single precision),
double-word (double precision), or a quad-word. The following instructions are used to load
or store a single FP/NEON register:

ldr Load FP/NEON Register, and
str Store FP/NEON Register.

9.4.1.1 Syntax

<op> Bt, <addr>
<op> Ht, <addr>
<op> St, <addr>
<op> Dt, <addr>
<op> Qt, <addr>

• <op> is either ldr or str.
• <addr> is one of the address specifiers described in Chapter 3, Section 3.3.3 on Page 61.
The valid shift amount for the Register Offset mode depends on the size of the register
being loaded or stored.

9.4.1.2 Operations

Name Effect Description
ldr Yt ← Mem[addr] Load Yt,where Yt is any FP register.
str Mem[addr] ← Yt Store Yt,where Yt is any FP register.